JPS61111176U - - Google Patents

Info

Publication number
JPS61111176U
JPS61111176U JP19569484U JP19569484U JPS61111176U JP S61111176 U JPS61111176 U JP S61111176U JP 19569484 U JP19569484 U JP 19569484U JP 19569484 U JP19569484 U JP 19569484U JP S61111176 U JPS61111176 U JP S61111176U
Authority
JP
Japan
Prior art keywords
hole
chip
component mounting
manufacturing process
discarded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19569484U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19569484U priority Critical patent/JPS61111176U/ja
Publication of JPS61111176U publication Critical patent/JPS61111176U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は混載型のプリント基板の断面図、第２
図は、第１図において半田付けをした状態を示す
図、第３図は第２図においてシンボルマークを印
刷した場合の半田付けをした状態を示す図、第４
図は本考案によるチツプ部品実装基板の製造工程
を示す図、第５図は本考案によるチツプ部品実装
基板の実施例を示す図である。 Figure 1 is a cross-sectional view of a mixed type printed circuit board, Figure 2
The figures show the soldered state in Fig. 1, Fig. 3 shows the soldered state when the symbol mark is printed in Fig. 2, and Fig. 4 shows the soldered state when the symbol mark is printed in Fig. 2.
The figures show the manufacturing process of the chip component mounting board according to the present invention, and FIG. 5 is a diagram showing an embodiment of the chip component mounting board according to the present invention.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板両面の銅箔を電気的に接続するためのスル
ーホール内に、製造工程上充填されるエツチング
レジストを廃棄せずに残存させておき、該エツチ
ングレジストを、チツプ部品取付用の半田が前記
スルーホール内に流れ込まないようにするための
穴埋め手段に利用することを特徴とするチツプ部
品実装基板。 Etching resist filled in the manufacturing process is left in the through holes for electrically connecting the copper foils on both sides of the board without being discarded. A chip component mounting board characterized in that it is used as a hole filling means to prevent the chip from flowing into the hole.
JP19569484U 1984-12-24 1984-12-24 Pending JPS61111176U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19569484U JPS61111176U (en) 1984-12-24 1984-12-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19569484U JPS61111176U (en) 1984-12-24 1984-12-24

Publications (1)

Publication Number Publication Date
JPS61111176U true JPS61111176U (en) 1986-07-14

Family

ID=30753298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19569484U Pending JPS61111176U (en) 1984-12-24 1984-12-24

Country Status (1)

Country Link
JP (1) JPS61111176U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5615096A (en) * 1979-07-18 1981-02-13 Shindo Denshi Kogyo Kk Method of manufacturing film circuit board
JPS5754393A (en) * 1980-09-19 1982-03-31 Nippon Electric Co INSATSUHAISENBAN

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5615096A (en) * 1979-07-18 1981-02-13 Shindo Denshi Kogyo Kk Method of manufacturing film circuit board
JPS5754393A (en) * 1980-09-19 1982-03-31 Nippon Electric Co INSATSUHAISENBAN

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