JPS583066U - printed wiring board - Google Patents
printed wiring boardInfo
- Publication number
- JPS583066U JPS583066U JP9517181U JP9517181U JPS583066U JP S583066 U JPS583066 U JP S583066U JP 9517181 U JP9517181 U JP 9517181U JP 9517181 U JP9517181 U JP 9517181U JP S583066 U JPS583066 U JP S583066U
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- insulating substrate
- conductive
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のプリント配線板の使用状態を示す要部断
面図、第2図は特許出願公告昭54−41102号に係
るプリント配線板の使用状態を示す要部断面図、°第3
図は本考案に係るプリント配線板の一実施例を示す使用
状態の要部断面図、第4図は同プリント配線板の要部平
面図である。
1:絶縁基板、2:導電体ランド、3:取付孔、4:半
田付抵抗層、5:電子部品、6:リード端子、7:半田
、10:橋絡防止用仕切壁。Figure 1 is a sectional view of the main part showing the usage state of a conventional printed wiring board, Figure 2 is a sectional view of the main part showing the usage state of the printed wiring board according to Patent Application Publication No. 54-41102, °3
The figure is a sectional view of a main part of an embodiment of the printed wiring board according to the present invention in a used state, and FIG. 4 is a plan view of the main part of the same printed wiring board. 1: Insulating substrate, 2: Conductor land, 3: Mounting hole, 4: Soldering resistance layer, 5: Electronic component, 6: Lead terminal, 7: Solder, 10: Partition wall for preventing bridging.
Claims (1)
ンの一部を導電体ランドとして形成し、この導電体ラン
ドを残して全面に半田付抵抗層を、 形成するプリント
配線板であって、前記導電体ランド間において前記絶縁
基板を半打ち抜き状態として半田間の橋絡防止用仕切壁
を形成したことを特徴とするプリント配線板。。A printed wiring board in which a conductive pattern is printed on an insulating substrate, a part of the conductive pattern is formed as a conductive land, and a soldering resistance layer is formed on the entire surface leaving the conductive land, the printed wiring board comprising: 1. A printed wiring board characterized in that the insulating substrate is semi-punched between conductor lands to form a partition wall for preventing bridging between solders. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9517181U JPS583066U (en) | 1981-06-29 | 1981-06-29 | printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9517181U JPS583066U (en) | 1981-06-29 | 1981-06-29 | printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS583066U true JPS583066U (en) | 1983-01-10 |
Family
ID=29890088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9517181U Pending JPS583066U (en) | 1981-06-29 | 1981-06-29 | printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS583066U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6025049U (en) * | 1983-07-22 | 1985-02-20 | オムロン株式会社 | image display device |
-
1981
- 1981-06-29 JP JP9517181U patent/JPS583066U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6025049U (en) * | 1983-07-22 | 1985-02-20 | オムロン株式会社 | image display device |
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