JPS61173175U - - Google Patents

Info

Publication number
JPS61173175U
JPS61173175U JP5556785U JP5556785U JPS61173175U JP S61173175 U JPS61173175 U JP S61173175U JP 5556785 U JP5556785 U JP 5556785U JP 5556785 U JP5556785 U JP 5556785U JP S61173175 U JPS61173175 U JP S61173175U
Authority
JP
Japan
Prior art keywords
land
circuit board
printed circuit
surface side
interval
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5556785U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5556785U priority Critical patent/JPS61173175U/ja
Publication of JPS61173175U publication Critical patent/JPS61173175U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の両面プリント基板の半田付
状態を示す断面図、第2図はプリント面とマウン
ド面のランドの形状及びレジスト面を示す平面図
、第3図はレジストの他の実施例を示す平面図、
第4図はこの考案の他の実施例を示すランド形状
の平面図である。 図中、1は電子部品、2はリード端子、3はプ
リント基板、4Pはプリント面側のランド、4M
はマウント面側のランド、5は半田、6はレジス
ト層を示す。
Fig. 1 is a sectional view showing the soldered state of the double-sided printed circuit board of this invention, Fig. 2 is a plan view showing the shape of the land on the printed surface and the mound surface, and the resist surface, and Fig. 3 is another example of the resist. A plan view showing
FIG. 4 is a plan view of a land shape showing another embodiment of this invention. In the figure, 1 is an electronic component, 2 is a lead terminal, 3 is a printed circuit board, 4P is a land on the printed surface side, 4M
5 indicates a land on the mounting surface side, 5 indicates solder, and 6 indicates a resist layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント基板のマウント面側に設けられている
第1のランド列と、前記プリント基板のプリント
面側に設けられている第2のランド列のそれぞれ
対応するランドをスルーホールにより接続し、前
記第1及び第2のランド列は、ランド露出面の部
分の間隔がランド間隔より広くなるようにレジス
トがかけられていることを特徴とする両面プリン
ト基板。
The corresponding lands of a first land row provided on the mounting surface side of the printed circuit board and a second land row provided on the printed surface side of the printed circuit board are connected by through holes, and and a double-sided printed circuit board, characterized in that the second land row is coated with a resist so that the interval between the land exposed surface portions is wider than the land interval.
JP5556785U 1985-04-16 1985-04-16 Pending JPS61173175U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5556785U JPS61173175U (en) 1985-04-16 1985-04-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5556785U JPS61173175U (en) 1985-04-16 1985-04-16

Publications (1)

Publication Number Publication Date
JPS61173175U true JPS61173175U (en) 1986-10-28

Family

ID=30578361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5556785U Pending JPS61173175U (en) 1985-04-16 1985-04-16

Country Status (1)

Country Link
JP (1) JPS61173175U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5550684A (en) * 1978-10-06 1980-04-12 Hitachi Ltd Printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5550684A (en) * 1978-10-06 1980-04-12 Hitachi Ltd Printed circuit board

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