JPS6156814B2 - - Google Patents

Info

Publication number
JPS6156814B2
JPS6156814B2 JP57050768A JP5076882A JPS6156814B2 JP S6156814 B2 JPS6156814 B2 JP S6156814B2 JP 57050768 A JP57050768 A JP 57050768A JP 5076882 A JP5076882 A JP 5076882A JP S6156814 B2 JPS6156814 B2 JP S6156814B2
Authority
JP
Japan
Prior art keywords
program
counter
loop
loop counter
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57050768A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58168150A (ja
Inventor
Akira Myasaka
Yutaka Moryama
Yukihiro Ando
Shigeru Ooe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57050768A priority Critical patent/JPS58168150A/ja
Publication of JPS58168150A publication Critical patent/JPS58168150A/ja
Publication of JPS6156814B2 publication Critical patent/JPS6156814B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
JP57050768A 1982-03-29 1982-03-29 ル−プカウンタ付プログラムカウンタ制御方式 Granted JPS58168150A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57050768A JPS58168150A (ja) 1982-03-29 1982-03-29 ル−プカウンタ付プログラムカウンタ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57050768A JPS58168150A (ja) 1982-03-29 1982-03-29 ル−プカウンタ付プログラムカウンタ制御方式

Publications (2)

Publication Number Publication Date
JPS58168150A JPS58168150A (ja) 1983-10-04
JPS6156814B2 true JPS6156814B2 (enrdf_load_stackoverflow) 1986-12-04

Family

ID=12868006

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57050768A Granted JPS58168150A (ja) 1982-03-29 1982-03-29 ル−プカウンタ付プログラムカウンタ制御方式

Country Status (1)

Country Link
JP (1) JPS58168150A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06229071A (ja) * 1993-02-04 1994-08-16 Kajima Corp 鉄筋コンクリート構造物の鉄筋および配筋構造

Also Published As

Publication number Publication date
JPS58168150A (ja) 1983-10-04

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