JPS61502288A - Ｘ×ｙビット・アレ−掛け算器／アキュムレ−タ回路 - Google Patents

Ｘ×ｙビット・アレ−掛け算器／アキュムレ−タ回路

Info

Publication number
JPS61502288A
JPS61502288A JP60501558A JP50155885A JPS61502288A JP S61502288 A JPS61502288 A JP S61502288A JP 60501558 A JP60501558 A JP 60501558A JP 50155885 A JP50155885 A JP 50155885A JP S61502288 A JPS61502288 A JP S61502288A
Authority
JP
Japan
Prior art keywords
rank
bits
adder
output
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60501558A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0555894B2 (cg-RX-API-DMAC7.html
Inventor
クローカー・ケビン　エル
シースレク・ロナルド　エイチ
Original Assignee
モトロ−ラ・インコ−ポレ−テッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by モトロ−ラ・インコ−ポレ−テッド filed Critical モトロ−ラ・インコ−ポレ−テッド
Publication of JPS61502288A publication Critical patent/JPS61502288A/ja
Publication of JPH0555894B2 publication Critical patent/JPH0555894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/5016—Half or full adders, i.e. basic adder cells for one denomination forming at least one of the output signals directly from the minterms of the input signals, i.e. with a minimum number of gate levels
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5332—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by skipping over strings of zeroes or ones, e.g. using the Booth Algorithm
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/386—Special constructional features
    • G06F2207/3876—Alternation of true and inverted stages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802—Special implementations
    • G06F2207/4812—Multiplexers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49994—Sign extension

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP60501558A 1984-05-31 1985-03-28 Ｘ×ｙビット・アレ−掛け算器／アキュムレ−タ回路 Granted JPS61502288A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/615,989 US4575812A (en) 1984-05-31 1984-05-31 X×Y Bit array multiplier/accumulator circuit
US615989 1984-05-31

Publications (2)

Publication Number Publication Date
JPS61502288A true JPS61502288A (ja) 1986-10-09
JPH0555894B2 JPH0555894B2 (cg-RX-API-DMAC7.html) 1993-08-18

Family

ID=24467600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60501558A Granted JPS61502288A (ja) 1984-05-31 1985-03-28 Ｘ×ｙビット・アレ−掛け算器／アキュムレ−タ回路

Country Status (7)

Country Link
US (1) US4575812A (cg-RX-API-DMAC7.html)
EP (1) EP0185025B1 (cg-RX-API-DMAC7.html)
JP (1) JPS61502288A (cg-RX-API-DMAC7.html)
KR (1) KR920007029B1 (cg-RX-API-DMAC7.html)
DE (1) DE3583999D1 (cg-RX-API-DMAC7.html)
IT (1) IT1181661B (cg-RX-API-DMAC7.html)
WO (1) WO1985005705A1 (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06119148A (ja) * 1990-09-20 1994-04-28 American Teleph & Telegr Co <Att> 演算回路

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JPS6068432A (ja) * 1983-09-22 1985-04-19 Hitachi Ltd キヤリセ−ブアダ−の符号生成方式
JPS60237534A (ja) * 1984-05-09 1985-11-26 Toshiba Corp 並列乗算器
JPS61114338A (ja) * 1984-11-09 1986-06-02 Hitachi Ltd 乗算器
JPS6222146A (ja) * 1985-07-23 1987-01-30 Toshiba Corp 並列乗算器
JPH0831025B2 (ja) * 1986-03-29 1996-03-27 株式会社東芝 乗算回路
JPS62229439A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 並列乗算器
JPS62229440A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 配列乗算器
US4831577A (en) * 1986-09-17 1989-05-16 Intersil, Inc. Digital multiplier architecture with triple array summation of partial products
US4864529A (en) * 1986-10-09 1989-09-05 North American Philips Corporation Fast multiplier architecture
JPS63241634A (ja) * 1987-03-30 1988-10-06 Toshiba Corp 並列型加算回路
US4817029A (en) * 1987-05-11 1989-03-28 United Technologies Corporation Multiple-precision Booth's recode multiplier
US4843585A (en) * 1987-09-14 1989-06-27 Motorola, Inc. Pipelineable structure for efficient multiplication and accumulation operations
US5103419A (en) * 1989-02-02 1992-04-07 Matsushita Electric Industrial Co., Ltd. Circuit for calculating the sum of products of data
US5038315A (en) * 1989-05-15 1991-08-06 At&T Bell Laboratories Multiplier circuit
US5184318A (en) * 1989-09-05 1993-02-02 Cyrix Corporation Rectangular array signed digit multiplier
US5144576A (en) * 1989-09-05 1992-09-01 Cyrix Corporation Signed digit multiplier
US5262976A (en) * 1989-11-13 1993-11-16 Harris Corporation Plural-bit recoding multiplier
EP0813143A3 (en) * 1989-11-13 1998-01-28 Harris Corporation Sign extension in plural-bit recoding multiplier
US5113363A (en) * 1989-12-29 1992-05-12 Ail Systems, Inc. Method and apparatus for computing arithmetic expressions using on-line operands and bit-serial processing
US5151875A (en) * 1990-03-16 1992-09-29 C-Cube Microsystems, Inc. MOS array multiplier cell
JPH04227534A (ja) * 1990-03-16 1992-08-17 C Cube Microsyst アレイ乗算器
KR920006323B1 (ko) * 1990-05-31 1992-08-03 삼성전자 주식회사 스킵(Skip)배열과 수정형 월리스(Wallace)트리를 사용하는 병렬 승산기
US5101372A (en) * 1990-09-28 1992-03-31 International Business Machines Corporation Optimum performance standard cell array multiplier
US5220525A (en) * 1991-11-04 1993-06-15 Motorola, Inc. Recoded iterative multiplier
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US5442576A (en) * 1994-05-26 1995-08-15 Motorola, Inc. Multibit shifting apparatus, data processor using same, and method therefor
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US5801978A (en) * 1994-09-22 1998-09-01 National Semiconductor Corporation Overflow detection for integer-multiply instruction
US5808927A (en) * 1994-10-18 1998-09-15 International Business Machines Corporation Apparatus for performing two's complement and unsigned multiply accumulate
US5598362A (en) * 1994-12-22 1997-01-28 Motorola Inc. Apparatus and method for performing both 24 bit and 16 bit arithmetic
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US5734601A (en) 1995-01-30 1998-03-31 Cirrus Logic, Inc. Booth multiplier with low power, high performance input circuitry
US5638313A (en) * 1995-01-30 1997-06-10 Cirrus Logic, Inc. Booth multiplier with high speed output circuitry
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US6066178A (en) * 1996-04-10 2000-05-23 Lsi Logic Corporation Automated design method and system for synthesizing digital multipliers
US5773995A (en) * 1996-04-22 1998-06-30 Motorola, Inc. Digital multiplexer circuit
US5761106A (en) * 1996-06-24 1998-06-02 Motorola, Inc. Horizontally pipelined multiplier circuit
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JP3678512B2 (ja) * 1996-08-29 2005-08-03 富士通株式会社 乗算回路、該乗算回路を構成する加算回路、該乗算回路の部分積ビット圧縮方法、および、該乗算回路を適用した大規模半導体集積回路
US5943250A (en) * 1996-10-21 1999-08-24 Samsung Electronics Co., Ltd. Parallel multiplier that supports multiple numbers with different bit lengths
JPH10143355A (ja) * 1996-10-30 1998-05-29 Texas Instr Inc <Ti> 種々の書式のオペランドを高効率で乗算する能力を有するマイクロプロセッサ及びその演算方法
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US6259957B1 (en) 1997-04-04 2001-07-10 Cirrus Logic, Inc. Circuits and methods for implementing audio Codecs and systems using the same
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US6029187A (en) * 1997-10-28 2000-02-22 Atmel Corporation Fast regular multiplier architecture
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Publication number Priority date Publication date Assignee Title
JPH06119148A (ja) * 1990-09-20 1994-04-28 American Teleph & Telegr Co <Att> 演算回路

Also Published As

Publication number Publication date
EP0185025A4 (cg-RX-API-DMAC7.html) 1986-09-04
KR920007029B1 (ko) 1992-08-24
WO1985005705A1 (en) 1985-12-19
IT8548053A1 (it) 1986-11-07
KR860700165A (ko) 1986-03-31
IT8548053A0 (it) 1985-05-07
JPH0555894B2 (cg-RX-API-DMAC7.html) 1993-08-18
EP0185025A1 (cg-RX-API-DMAC7.html) 1986-06-25
EP0185025B1 (en) 1991-09-04
IT1181661B (it) 1987-09-30
DE3583999D1 (de) 1991-10-10
US4575812A (en) 1986-03-11

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