JPS61500642A - バイポ−ラ・ジヤンクシヨン・トランジスタの製造方法 - Google Patents

バイポ−ラ・ジヤンクシヨン・トランジスタの製造方法

Info

Publication number
JPS61500642A
JPS61500642A JP59504480A JP50448084A JPS61500642A JP S61500642 A JPS61500642 A JP S61500642A JP 59504480 A JP59504480 A JP 59504480A JP 50448084 A JP50448084 A JP 50448084A JP S61500642 A JPS61500642 A JP S61500642A
Authority
JP
Japan
Prior art keywords
silicon
region
collector
depositing
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59504480A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0473619B2 (fr
Inventor
サリヴアン，ポール　アンドリユー
コリンズ，ジヨージ　ジヨセフ
Original Assignee
エヌ・シー・アール・インターナショナル・インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エヌ・シー・アール・インターナショナル・インコーポレイテッド filed Critical エヌ・シー・アール・インターナショナル・インコーポレイテッド
Publication of JPS61500642A publication Critical patent/JPS61500642A/ja
Publication of JPH0473619B2 publication Critical patent/JPH0473619B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H01L29/66287—Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7325—Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/011—Bipolar transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/092—Laser beam processing-diodes or transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Bipolar Transistors (AREA)
JP59504480A 1983-12-05 1984-12-04 バイポ−ラ・ジヤンクシヨン・トランジスタの製造方法 Granted JPS61500642A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/558,252 US4523370A (en) 1983-12-05 1983-12-05 Process for fabricating a bipolar transistor with a thin base and an abrupt base-collector junction
US558252 1983-12-05

Publications (2)

Publication Number Publication Date
JPS61500642A true JPS61500642A (ja) 1986-04-03
JPH0473619B2 JPH0473619B2 (fr) 1992-11-24

Family

ID=24228795

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59504480A Granted JPS61500642A (ja) 1983-12-05 1984-12-04 バイポ−ラ・ジヤンクシヨン・トランジスタの製造方法

Country Status (5)

Country Link
US (1) US4523370A (fr)
EP (1) EP0165971B1 (fr)
JP (1) JPS61500642A (fr)
DE (1) DE3475247D1 (fr)
WO (1) WO1985002714A1 (fr)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1197628A (fr) * 1984-01-05 1985-12-03 Thomas W. Macelwee Fabrication de dispositifs mos empiles
US4617066A (en) * 1984-11-26 1986-10-14 Hughes Aircraft Company Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
US4651410A (en) * 1984-12-18 1987-03-24 Semiconductor Division Thomson-Csf Components Corporation Method of fabricating regions of a bipolar microwave integratable transistor
GB8507624D0 (en) * 1985-03-23 1985-05-01 Standard Telephones Cables Ltd Semiconductor devices
US5296405A (en) * 1985-08-02 1994-03-22 Semiconductor Energy Laboratory Co.., Ltd. Method for photo annealing non-single crystalline semiconductor films
EP0211634B1 (fr) * 1985-08-02 1994-03-23 Sel Semiconductor Energy Laboratory Co., Ltd. Procédé et appareil pour la fabrication de dispositifs semi-conducteurs
US5753542A (en) * 1985-08-02 1998-05-19 Semiconductor Energy Laboratory Co., Ltd. Method for crystallizing semiconductor material without exposing it to air
GB2180688B (en) * 1985-09-21 1989-09-13 Stc Plc Transistors
DE3545244A1 (de) * 1985-12-20 1987-06-25 Licentia Gmbh Strukturierter halbleiterkoerper
JPH01179342A (ja) * 1988-01-05 1989-07-17 Toshiba Corp 複合半導体結晶体
US4929995A (en) * 1988-02-16 1990-05-29 Honeywell Inc. Selective integrated circuit interconnection
US5270224A (en) * 1988-03-11 1993-12-14 Fujitsu Limited Method of manufacturing a semiconductor device having a region doped to a level exceeding the solubility limit
US5518937A (en) * 1988-03-11 1996-05-21 Fujitsu Limited Semiconductor device having a region doped to a level exceeding the solubility limit
EP0332101B1 (fr) * 1988-03-11 1997-06-04 Fujitsu Limited Dispositif semi-conducteur avec une région dopée à un niveau dépassant la limite de solubilité
US5262672A (en) * 1989-08-09 1993-11-16 National Semiconductor Corporation Apparatus for improvement of interconnection capacitance
US5185276A (en) * 1990-01-31 1993-02-09 International Business Machines Corporation Method for improving low temperature current gain of bipolar transistors
US5930608A (en) 1992-02-21 1999-07-27 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor in which the channel region of the transistor consists of two portions of differing crystallinity
US5578520A (en) 1991-05-28 1996-11-26 Semiconductor Energy Laboratory Co., Ltd. Method for annealing a semiconductor
US5766344A (en) 1991-09-21 1998-06-16 Semiconductor Energy Laboratory Co., Ltd. Method for forming a semiconductor
US5591674A (en) * 1991-12-30 1997-01-07 Lucent Technologies Inc. Integrated circuit with silicon contact to silicide
US5266504A (en) * 1992-03-26 1993-11-30 International Business Machines Corporation Low temperature emitter process for high performance bipolar devices
US7097712B1 (en) 1992-12-04 2006-08-29 Semiconductor Energy Laboratory Co., Ltd. Apparatus for processing a semiconductor
CN100367461C (zh) 1993-11-05 2008-02-06 株式会社半导体能源研究所 一种制造薄膜晶体管和电子器件的方法
US6897100B2 (en) 1993-11-05 2005-05-24 Semiconductor Energy Laboratory Co., Ltd. Method for processing semiconductor device apparatus for processing a semiconductor and apparatus for processing semiconductor device
JPH09146108A (ja) 1995-11-17 1997-06-06 Semiconductor Energy Lab Co Ltd 液晶表示装置およびその駆動方法
US6800875B1 (en) 1995-11-17 2004-10-05 Semiconductor Energy Laboratory Co., Ltd. Active matrix electro-luminescent display device with an organic leveling layer
TW439003B (en) * 1995-11-17 2001-06-07 Semiconductor Energy Lab Display device
TW309633B (fr) * 1995-12-14 1997-07-01 Handotai Energy Kenkyusho Kk
JPH10284431A (ja) * 1997-04-11 1998-10-23 Sharp Corp Ｓｏｉ基板の製造方法
US6475836B1 (en) * 1999-03-29 2002-11-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR100566675B1 (ko) * 2004-12-14 2006-03-31 삼성전자주식회사 반도체 장치와 그 제조 방법
DE102007010563A1 (de) * 2007-02-22 2008-08-28 IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik Selektives Wachstum von polykristallinem siliziumhaltigen Halbleitermaterial auf siliziumhaltiger Halbleiteroberfläche
US8810005B1 (en) 2013-03-01 2014-08-19 International Business Machines Corporation Bipolar device having a monocrystalline semiconductor intrinsic base to extrinsic base link-up region
US8946861B2 (en) 2013-06-11 2015-02-03 International Business Machines Corporation Bipolar device having a monocrystalline semiconductor intrinsic base to extrinsic base link-up region
US20160313577A1 (en) * 2015-04-23 2016-10-27 Laxense Inc. Dual-junction optical modulator and the method to make the same
RU2751982C1 (ru) * 2020-03-18 2021-07-21 Федеральное государственное бюджетное образовательное учреждение высшего образования «Кабардино-Балкарский государственный университет им. Х.М. Бербекова» (КБГУ) Способ изготовления полупроводникового прибора

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4190949A (en) * 1977-11-14 1980-03-04 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device
NL7810549A (nl) * 1978-10-23 1980-04-25 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting.
US4272880A (en) * 1979-04-20 1981-06-16 Intel Corporation MOS/SOS Process
JPS561556A (en) * 1979-06-18 1981-01-09 Hitachi Ltd Semiconductor device
US4252581A (en) * 1979-10-01 1981-02-24 International Business Machines Corporation Selective epitaxy method for making filamentary pedestal transistor
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
US4269631A (en) * 1980-01-14 1981-05-26 International Business Machines Corporation Selective epitaxy method using laser annealing for making filamentary transistors
US4357622A (en) * 1980-01-18 1982-11-02 International Business Machines Corporation Complementary transistor structure
DE3016553A1 (de) * 1980-04-29 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Planartransistor, insbesondere fuer i(pfeil hoch)2(pfeil hoch) l-strukturen
JPS5737870A (en) * 1980-08-20 1982-03-02 Toshiba Corp Semiconductor device
US4437897A (en) * 1982-05-18 1984-03-20 International Business Machines Corporation Fabrication process for a shallow emitter/base transistor using same polycrystalline layer

Also Published As

Publication number Publication date
DE3475247D1 (en) 1988-12-22
US4523370A (en) 1985-06-18
JPH0473619B2 (fr) 1992-11-24
WO1985002714A1 (fr) 1985-06-20
EP0165971B1 (fr) 1988-11-17
EP0165971A1 (fr) 1986-01-02

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