JPS6148966A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS6148966A
JPS6148966A JP59170690A JP17069084A JPS6148966A JP S6148966 A JPS6148966 A JP S6148966A JP 59170690 A JP59170690 A JP 59170690A JP 17069084 A JP17069084 A JP 17069084A JP S6148966 A JPS6148966 A JP S6148966A
Authority
JP
Japan
Prior art keywords
type
layer
transistor
base
bipolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59170690A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0379870B2 (enrdf_load_stackoverflow
Inventor
Hirobumi Uchida
博文 内田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP59170690A priority Critical patent/JPS6148966A/ja
Publication of JPS6148966A publication Critical patent/JPS6148966A/ja
Publication of JPH0379870B2 publication Critical patent/JPH0379870B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP59170690A 1984-08-16 1984-08-16 半導体装置の製造方法 Granted JPS6148966A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59170690A JPS6148966A (ja) 1984-08-16 1984-08-16 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59170690A JPS6148966A (ja) 1984-08-16 1984-08-16 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS6148966A true JPS6148966A (ja) 1986-03-10
JPH0379870B2 JPH0379870B2 (enrdf_load_stackoverflow) 1991-12-20

Family

ID=15909586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59170690A Granted JPS6148966A (ja) 1984-08-16 1984-08-16 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS6148966A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0379870B2 (enrdf_load_stackoverflow) 1991-12-20

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