JPS6148927A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6148927A
JPS6148927A JP59170691A JP17069184A JPS6148927A JP S6148927 A JPS6148927 A JP S6148927A JP 59170691 A JP59170691 A JP 59170691A JP 17069184 A JP17069184 A JP 17069184A JP S6148927 A JPS6148927 A JP S6148927A
Authority
JP
Japan
Prior art keywords
gate
diffusion
diffusion layer
diffusion region
measuring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59170691A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0586858B2 (enrdf_load_stackoverflow
Inventor
Masaharu Yamamoto
雅晴 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP59170691A priority Critical patent/JPS6148927A/ja
Publication of JPS6148927A publication Critical patent/JPS6148927A/ja
Publication of JPH0586858B2 publication Critical patent/JPH0586858B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)
JP59170691A 1984-08-16 1984-08-16 半導体装置 Granted JPS6148927A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59170691A JPS6148927A (ja) 1984-08-16 1984-08-16 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59170691A JPS6148927A (ja) 1984-08-16 1984-08-16 半導体装置

Publications (2)

Publication Number Publication Date
JPS6148927A true JPS6148927A (ja) 1986-03-10
JPH0586858B2 JPH0586858B2 (enrdf_load_stackoverflow) 1993-12-14

Family

ID=15909605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59170691A Granted JPS6148927A (ja) 1984-08-16 1984-08-16 半導体装置

Country Status (1)

Country Link
JP (1) JPS6148927A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02129943A (ja) * 1988-11-09 1990-05-18 Fujitsu Ltd 半導体装置の製造方法
JPH056861A (ja) * 1991-06-26 1993-01-14 Nec Yamagata Ltd 半導体製造管理装置
US7595557B2 (en) 2005-06-17 2009-09-29 Panasonic Corporation Semiconductor device and manufacturing method thereof
JP2016174063A (ja) * 2015-03-17 2016-09-29 株式会社日立製作所 半導体装置、半導体装置の製造方法および回路システム

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5292482A (en) * 1976-01-30 1977-08-03 Hitachi Ltd Measuring of contamination of semiconductor element
JPS56152246A (en) * 1980-04-25 1981-11-25 Pioneer Electronic Corp Manufacture of semiconductor device
JPS583039U (ja) * 1981-06-29 1983-01-10 富士通株式会社 半導体回路装置の評価部構造
JPS59105375A (ja) * 1982-12-08 1984-06-18 Nec Corp 半導体装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5292482A (en) * 1976-01-30 1977-08-03 Hitachi Ltd Measuring of contamination of semiconductor element
JPS56152246A (en) * 1980-04-25 1981-11-25 Pioneer Electronic Corp Manufacture of semiconductor device
JPS583039U (ja) * 1981-06-29 1983-01-10 富士通株式会社 半導体回路装置の評価部構造
JPS59105375A (ja) * 1982-12-08 1984-06-18 Nec Corp 半導体装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02129943A (ja) * 1988-11-09 1990-05-18 Fujitsu Ltd 半導体装置の製造方法
JPH056861A (ja) * 1991-06-26 1993-01-14 Nec Yamagata Ltd 半導体製造管理装置
US7595557B2 (en) 2005-06-17 2009-09-29 Panasonic Corporation Semiconductor device and manufacturing method thereof
JP2016174063A (ja) * 2015-03-17 2016-09-29 株式会社日立製作所 半導体装置、半導体装置の製造方法および回路システム

Also Published As

Publication number Publication date
JPH0586858B2 (enrdf_load_stackoverflow) 1993-12-14

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