JPS61177762A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS61177762A JPS61177762A JP60017823A JP1782385A JPS61177762A JP S61177762 A JPS61177762 A JP S61177762A JP 60017823 A JP60017823 A JP 60017823A JP 1782385 A JP1782385 A JP 1782385A JP S61177762 A JPS61177762 A JP S61177762A
- Authority
- JP
- Japan
- Prior art keywords
- corners
- pad
- pads
- rounded
- insulating plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 23
- 238000000034 method Methods 0.000 claims abstract description 17
- 239000000853 adhesive Substances 0.000 claims description 13
- 230000001070 adhesive effect Effects 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000010949 copper Substances 0.000 abstract description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 20
- 229910052802 copper Inorganic materials 0.000 abstract description 20
- 238000009413 insulation Methods 0.000 abstract description 6
- 239000000758 substrate Substances 0.000 abstract description 3
- 238000005530 etching Methods 0.000 abstract description 2
- 238000004080 punching Methods 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 14
- 238000010586 diagram Methods 0.000 description 9
- 230000017525 heat dissipation Effects 0.000 description 7
- 239000000919 ceramic Substances 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 238000005336 cracking Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000012141 concentrate Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- NEIHULKJZQTQKJ-UHFFFAOYSA-N [Cu].[Ag] Chemical compound [Cu].[Ag] NEIHULKJZQTQKJ-UHFFFAOYSA-N 0.000 description 1
- -1 and the like Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60017823A JPS61177762A (ja) | 1985-02-01 | 1985-02-01 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60017823A JPS61177762A (ja) | 1985-02-01 | 1985-02-01 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61177762A true JPS61177762A (ja) | 1986-08-09 |
JPH0418694B2 JPH0418694B2 (enrdf_load_stackoverflow) | 1992-03-27 |
Family
ID=11954445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60017823A Granted JPS61177762A (ja) | 1985-02-01 | 1985-02-01 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61177762A (enrdf_load_stackoverflow) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5727727A (en) * | 1995-02-02 | 1998-03-17 | Vlt Corporation | Flowing solder in a gap |
US5808358A (en) * | 1994-11-10 | 1998-09-15 | Vlt Corporation | Packaging electrical circuits |
US5876859A (en) * | 1994-11-10 | 1999-03-02 | Vlt Corporation | Direct metal bonding |
US5945130A (en) * | 1994-11-15 | 1999-08-31 | Vlt Corporation | Apparatus for circuit encapsulation |
EP1814153A3 (en) * | 1996-09-12 | 2008-09-24 | Ibiden Co., Ltd. | Circuit board for mounting electronic parts |
USRE44251E1 (en) | 1996-09-12 | 2013-06-04 | Ibiden Co., Ltd. | Circuit board for mounting electronic parts |
JP2017130633A (ja) * | 2016-01-22 | 2017-07-27 | 豊田合成株式会社 | 発光装置 |
JP2018032742A (ja) * | 2016-08-24 | 2018-03-01 | トヨタ自動車株式会社 | 半導体装置 |
JP2021125617A (ja) * | 2020-02-07 | 2021-08-30 | 富士電機株式会社 | 半導体装置 |
DE102019217679B4 (de) | 2018-11-19 | 2023-11-02 | Skyworks Solutions, Inc. | Elektronisches vorrichtungsgehäuse und hochfrequenzfilter mit hochbelastbaren lötanschlussstellen |
-
1985
- 1985-02-01 JP JP60017823A patent/JPS61177762A/ja active Granted
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6159772A (en) * | 1994-11-10 | 2000-12-12 | Vlt Corporation | Packaging electrical circuits |
US6119923A (en) * | 1994-11-10 | 2000-09-19 | Vlt Corporation | Packaging electrical circuits |
US5876859A (en) * | 1994-11-10 | 1999-03-02 | Vlt Corporation | Direct metal bonding |
US5906310A (en) * | 1994-11-10 | 1999-05-25 | Vlt Corporation | Packaging electrical circuits |
US5938104A (en) * | 1994-11-10 | 1999-08-17 | Vlt Corporation | Direct metal bonding |
US5808358A (en) * | 1994-11-10 | 1998-09-15 | Vlt Corporation | Packaging electrical circuits |
US6096981A (en) * | 1994-11-10 | 2000-08-01 | Vlt Corporation | Packaging electrical circuits |
US6710257B2 (en) | 1994-11-15 | 2004-03-23 | Vlt Corporation | Circuit encapsulation |
US5945130A (en) * | 1994-11-15 | 1999-08-31 | Vlt Corporation | Apparatus for circuit encapsulation |
US6403009B1 (en) * | 1994-11-15 | 2002-06-11 | Vlt Corporation | Circuit encapsulation |
US5727727A (en) * | 1995-02-02 | 1998-03-17 | Vlt Corporation | Flowing solder in a gap |
EP1814153A3 (en) * | 1996-09-12 | 2008-09-24 | Ibiden Co., Ltd. | Circuit board for mounting electronic parts |
USRE44251E1 (en) | 1996-09-12 | 2013-06-04 | Ibiden Co., Ltd. | Circuit board for mounting electronic parts |
JP2017130633A (ja) * | 2016-01-22 | 2017-07-27 | 豊田合成株式会社 | 発光装置 |
JP2018032742A (ja) * | 2016-08-24 | 2018-03-01 | トヨタ自動車株式会社 | 半導体装置 |
DE102019217679B4 (de) | 2018-11-19 | 2023-11-02 | Skyworks Solutions, Inc. | Elektronisches vorrichtungsgehäuse und hochfrequenzfilter mit hochbelastbaren lötanschlussstellen |
US12356545B2 (en) | 2018-11-19 | 2025-07-08 | Skyworks Solutions, Inc. | High durability solder terminals |
JP2021125617A (ja) * | 2020-02-07 | 2021-08-30 | 富士電機株式会社 | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0418694B2 (enrdf_load_stackoverflow) | 1992-03-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7759778B2 (en) | Leaded semiconductor power module with direct bonding and double sided cooling | |
JP2664754B2 (ja) | 高密度電子パッケージ及びその製造方法 | |
JPS59141249A (ja) | 電力チツプ・パツケ−ジ | |
KR102511000B1 (ko) | 반도체 패키지용 클립 구조체 및 이를 포함하는 반도체 패키지 | |
US6433424B1 (en) | Semiconductor device package and lead frame with die overhanging lead frame pad | |
JPS6376444A (ja) | チツプキヤリア | |
JPS61177762A (ja) | 半導体装置 | |
JPS60167454A (ja) | 半導体装置 | |
US6168975B1 (en) | Method of forming extended lead package | |
JP2501953B2 (ja) | 半導体装置 | |
JPH05343558A (ja) | 半導体パッケージ | |
JPH0638458B2 (ja) | チツプキヤリアとその製造方法 | |
JPH07176664A (ja) | 半導体装置およびその製造方法 | |
JPH01187841A (ja) | 半導体装置 | |
JPH0318344B2 (enrdf_load_stackoverflow) | ||
JPS60154643A (ja) | 半導体装置 | |
JPS5972755A (ja) | 半導体装置 | |
JPH11135532A (ja) | 半導体チップ及び半導体装置 | |
JPH0786497A (ja) | インテリジェントパワーモジュール | |
JPH01319971A (ja) | 半導体装置 | |
KR100192757B1 (ko) | 반도체 패키지의 구조 | |
JPS61270850A (ja) | 半導体チツプ実装用パツケ−ジ | |
JPH01173747A (ja) | 樹脂封止形半導体装置 | |
JPH0496240A (ja) | 半導体集積回路装置およびその実装方法 | |
JP2000124390A (ja) | Icパッケージ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |