JPS61166130A - ホトレジストパタ−ンの形成方法 - Google Patents
ホトレジストパタ−ンの形成方法Info
- Publication number
- JPS61166130A JPS61166130A JP60006964A JP696485A JPS61166130A JP S61166130 A JPS61166130 A JP S61166130A JP 60006964 A JP60006964 A JP 60006964A JP 696485 A JP696485 A JP 696485A JP S61166130 A JPS61166130 A JP S61166130A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- opening
- exposed
- photoresist
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 35
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000010438 heat treatment Methods 0.000 claims abstract description 18
- 229920003986 novolac Polymers 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 6
- 239000010408 film Substances 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 229910052814 silicon oxide Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- VDUVBBMAXXHEQP-SLINCCQESA-M oxacillin sodium Chemical group [Na+].N([C@@H]1C(N2[C@H](C(C)(C)S[C@@H]21)C([O-])=O)=O)C(=O)C1=C(C)ON=C1C1=CC=CC=C1 VDUVBBMAXXHEQP-SLINCCQESA-M 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60006964A JPS61166130A (ja) | 1985-01-18 | 1985-01-18 | ホトレジストパタ−ンの形成方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60006964A JPS61166130A (ja) | 1985-01-18 | 1985-01-18 | ホトレジストパタ−ンの形成方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61166130A true JPS61166130A (ja) | 1986-07-26 |
| JPH058567B2 JPH058567B2 (enrdf_load_stackoverflow) | 1993-02-02 |
Family
ID=11652888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60006964A Granted JPS61166130A (ja) | 1985-01-18 | 1985-01-18 | ホトレジストパタ−ンの形成方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61166130A (enrdf_load_stackoverflow) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63261836A (ja) * | 1987-04-20 | 1988-10-28 | Nec Corp | 縮小投影露光法によるテ−パ−形成方法 |
| JPS63301521A (ja) * | 1987-06-01 | 1988-12-08 | Nec Corp | パタ−ン形成法 |
| US5096802A (en) * | 1990-11-09 | 1992-03-17 | Hewlett-Packard Company | Holes and spaces shrinkage |
| US5516626A (en) * | 1990-04-23 | 1996-05-14 | Tadahiro Ohmi | Resist processing method |
| US6956641B2 (en) | 2000-03-27 | 2005-10-18 | Oki Electric Industry, Co., Ltd. | Method of forming resist pattern, and exposure device |
| JP2016511544A (ja) * | 2013-02-15 | 2016-04-14 | トランスフォーム インコーポレーテッド | 半導体デバイスの電極及びその製造方法 |
| CN106504981A (zh) * | 2016-10-14 | 2017-03-15 | 电子科技大学 | 一种制备角度可控缓坡微结构的方法 |
-
1985
- 1985-01-18 JP JP60006964A patent/JPS61166130A/ja active Granted
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63261836A (ja) * | 1987-04-20 | 1988-10-28 | Nec Corp | 縮小投影露光法によるテ−パ−形成方法 |
| JPS63301521A (ja) * | 1987-06-01 | 1988-12-08 | Nec Corp | パタ−ン形成法 |
| US5516626A (en) * | 1990-04-23 | 1996-05-14 | Tadahiro Ohmi | Resist processing method |
| US5096802A (en) * | 1990-11-09 | 1992-03-17 | Hewlett-Packard Company | Holes and spaces shrinkage |
| US6956641B2 (en) | 2000-03-27 | 2005-10-18 | Oki Electric Industry, Co., Ltd. | Method of forming resist pattern, and exposure device |
| JP2016511544A (ja) * | 2013-02-15 | 2016-04-14 | トランスフォーム インコーポレーテッド | 半導体デバイスの電極及びその製造方法 |
| CN106504981A (zh) * | 2016-10-14 | 2017-03-15 | 电子科技大学 | 一种制备角度可控缓坡微结构的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH058567B2 (enrdf_load_stackoverflow) | 1993-02-02 |
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