JPS61166130A - Formation of photoresist pattern - Google Patents
Formation of photoresist patternInfo
- Publication number
- JPS61166130A JPS61166130A JP60006964A JP696485A JPS61166130A JP S61166130 A JPS61166130 A JP S61166130A JP 60006964 A JP60006964 A JP 60006964A JP 696485 A JP696485 A JP 696485A JP S61166130 A JPS61166130 A JP S61166130A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- opening
- exposed
- photoresist
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 35
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000010438 heat treatment Methods 0.000 claims abstract description 18
- 229920003986 novolac Polymers 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 6
- 239000010408 film Substances 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 229910052814 silicon oxide Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- VDUVBBMAXXHEQP-SLINCCQESA-M oxacillin sodium Chemical group [Na+].N([C@@H]1C(N2[C@H](C(C)(C)S[C@@H]21)C([O-])=O)=O)C(=O)C1=C(C)ON=C1C1=CC=CC=C1 VDUVBBMAXXHEQP-SLINCCQESA-M 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はホトレジストパターンの形成方法、とくにシリ
コン基板上に形成された酸化シリコン膜等の薄膜に傾斜
のついた側壁を持った開口部を形成するために、この薄
膜の上に塗布されたポトレジストの開口部において、側
壁が傾斜を持つホトレジストパターンを形成する方法に
関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for forming a photoresist pattern, particularly for forming an opening having an inclined sidewall in a thin film such as a silicon oxide film formed on a silicon substrate. The present invention relates to a method of forming a photoresist pattern having sloped sidewalls in the openings of the photoresist coated on the thin film.
従来の技術
モノリシック半導体装置において金属配線層を形成する
場合、コンタクト窓等の断差部分で金属配線層に断切れ
がおこりやすい。このだめ、断差部分の側壁を傾斜面と
し断切れを防ぐ、所謂ステップカバレッジを良くする方
法がよくとられている。この側壁をを傾斜面としたコン
タクト窓等を形成するため、コンタクト窓を形成するだ
めのレジストパターン開口部の側壁を傾斜面とする方法
がよくとられている。BACKGROUND ART When forming a metal wiring layer in a monolithic semiconductor device, the metal wiring layer is likely to be broken at a gap such as a contact window. To avoid this problem, a method is often used to improve so-called step coverage by making the side walls of the difference portions sloped surfaces to prevent breakage. In order to form a contact window or the like in which the sidewall is a sloped surface, a method is often used in which the sidewall of the resist pattern opening where the contact window is to be formed is formed into a sloped surface.
従来、側壁を傾斜面とした、この種のホトレジストパタ
ーンの形成は、第２図に示すような形成方法によって、
おこなわれていた。１ず、シリコン基板１を覆う酸化シ
リコン膜２の上の全域にホトレジスト膜３を形成したの
ち、縮小投影露光装置を用いた露光とこれに続く現像処
理を経て垂直々側壁を持つ開口部４をホトレジストに形
成して第２図（−）で示す状態を得、次いでこのホトレ
ジストパターンに、所定温度で所定温度で所定時間にわ
たる熱処理を施す。この熱処理よりレジストに而を呈す
る開口部６が形成される。このように開［］部の側壁を
煩多１面としたホトレジストをマスクとしてホトレジス
ト
エツチングレートを等しく、かつ、異方性エツチングの
条件で反応性イオン・エンチングを施すことにより、第
３図に示ずＪ二うな側壁が傾胴面とされたコンタクト窓
６が酸化シリコン膜２に形成される。このようカコンタ
クト窓をもつ半導体装置に金属配線層を形成する々らば
断差部が傾胴面となっているため断切れかなくなり、金
属配線層のステンプカバレノジを良好に保つことができ
る。Conventionally, this type of photoresist pattern with sloped side walls has been formed by a forming method as shown in FIG.
It was being done. 1. First, a photoresist film 3 is formed over the entire area of the silicon oxide film 2 covering the silicon substrate 1, and then an opening 4 having vertical side walls is formed through exposure using a reduction projection exposure device and subsequent development processing. The photoresist pattern is formed on a photoresist to obtain the state shown in FIG. Through this heat treatment, openings 6 that appear in the resist are formed. By using the photoresist with the side wall of the opening as a mask as a mask, reactive ion etching was carried out under anisotropic etching conditions at the same photoresist etching rate, as shown in Fig. 3. A contact window 6 whose sidewalls are inclined surfaces is formed in the silicon oxide film 2. In a semiconductor device having such a contact window, the difference between the edges where the metal wiring layer is formed is a tilted surface, which prevents the metal wiring layer from being cut off, making it possible to maintain good stamp coverage of the metal wiring layer. can.
発明が解決しようとする問題点
しかし、このような従来のホトレジストパターンフロ〜
させてパターンの形成が外されるため、側壁の傾多１角
度およびレジスト開口部の幅（パターン幅）を制御する
ことが困難であった。Problems that the invention seeks to solve However, such conventional photoresist pattern flow
Since the pattern is not formed, it is difficult to control the inclination angle of the sidewall and the width of the resist opening (pattern width).
因に、第４図（ａ）に示すように、周囲に多量のレジス
トが存在するレジスト開口部７および周囲に少量レジス
トが存在するレジスト開口部８をもつレジスト層に熱処
理を施すと、第４図（′ｂ）で示すように側壁が傾刷面
を呈するレジスト開口部９」ｏ・よび１０が形成される
ものの、開口部周辺のレジス）・の鼠に」こり熱処理に
ともない開口部へ流れだずレジスｊ・のｍが異々るため
に、周囲に多量のレジストが存在する開口部９ては側壁
の傾旧がゆるやかで、パターン幅が狭くなり、一方、周
囲に少量のレジストが存在する開口部１ｏでは側壁の傾
旧が急峻で、パターン幅はあ１り変化１〜ないレジスト
パターンとなる。寸だこの方法では、すべての開［］１
部において、レジストが流れるため、特定の開１１部の
側壁のみを煩多１のついた面形状とする選択的な加工を
施すことはできんかった。Incidentally, as shown in FIG. 4(a), when heat treatment is applied to a resist layer having a resist opening 7 surrounded by a large amount of resist and a resist opening 8 surrounded by a small amount of resist, the fourth As shown in Figure ('b), although resist openings 9'o and 10 with side walls exhibiting inclined surfaces are formed, the resists around the openings become stiff and flow toward the openings during heat treatment. Because the m of the dozu resist j is different, the opening 9 where a large amount of resist exists around the opening 9 has a gentle slope of the side wall and the pattern width becomes narrow, while a small amount of resist exists around the opening 9. In the opening 1o, the sidewall slope is steep, and the resist pattern has a pattern width with only 1 to no change. In this method, all openings []1
Since the resist flowed in the portion, it was not possible to selectively process only the side wall of a specific opening 11 into a surface shape with a zigzag 1.
問題点を解決するだめの手段
上記の問題点を解決するだめの本発明のホトレジスト・
パターンの形成方法は、基板上に形成されたノボラック
系ホトレジスト
た後、少なくとも一部の端縁を含む前記開口部の周囲近
傍に位置する前記ホｉ・レジスト膜部分を波５ ・、−
長が３ ５ ０ ｎ ｍ以上４ ５ ０ ｎ ｍ以下の
紫外光で露光した後、１００℃以上１５０℃以下の温度
で熱処理を施してホトレジストパターンを形成する方法
である。Means for Solving the Problems The photoresist of the present invention for solving the above problems.
The pattern formation method is to apply a novolac photoresist formed on a substrate, and then apply a wave 5 . In this method, a photoresist pattern is formed by exposing the photoresist to ultraviolet light of 350 nm or more and 450 nm or less, and then performing heat treatment at a temperature of 100° C. or more and 150° C. or less.
作 用
この方法によれは、レジスト開口部の周辺に位置ｊ−、
紫外光で露光されたレジストのみが熱処理によってフロ
ーする。したがって、紫外光による露光に選択性をもた
ぜる々らば特定の開口部の側壁にのみ煩多Ｉの伺与され
たホトレジストパターンを形成することができる。This method prevents cracks from occurring around the resist openings.
Only the resist exposed to ultraviolet light will flow upon heat treatment. Therefore, by imparting selectivity to the exposure with ultraviolet light, it is possible to form a photoresist pattern having a complex pattern only on the side wall of a specific opening.
実施例
以下に、本発明のホトレジストパターン方法の一実施例
を第１図を参照して説明する。EXAMPLE An example of the photoresist patterning method of the present invention will be described below with reference to FIG.
捷ず、第１図（ａ）に示すように、シリコン基板１１上
に熱酸化法を用いて酸化シリコン膜１２を成長させ、同
酸化シリコン膜１２の上に東京応化製のノボラック系ホ
）・レジスｌ− （品番ＯＦＰＲ８００）を塗布してホ
トレジスト膜１３を形成し、縮小投影露光装置を用いた
露光と、これに続く現像処理に」こり、ホトレジスト膜
１３にレジスト開口部１４を形成する。露光装置として
縮小投影露光装置を用いているのでレジスト開口部１４
は、側壁が垂直に近い断面形状になる。As shown in FIG. 1(a), a silicon oxide film 12 is grown on the silicon substrate 11 using a thermal oxidation method, and a novolak-based film (made by Tokyo Ohka Co., Ltd.) is grown on the silicon oxide film 12, as shown in FIG. 1(a). A photoresist film 13 is formed by applying resist l- (product number OFPR800), and resist openings 14 are formed in the photoresist film 13 through exposure using a reduction projection exposure device and subsequent development processing. Since a reduction projection exposure device is used as the exposure device, the resist opening 14
has a cross-sectional shape in which the side walls are nearly vertical.
次に第２図（＋））に示すように、ホトレジスト膜１３
の上部に、レジスト開口部１４を包含し、かつ、レジス
ト開口部１４より広い所定領域に対向する領域が透明々
ホトマスク１６を配置し、縮小投影露光装置により、波
長が４ ３ ０ ｎ ｍの紫外光１６で露光を行う。ホ
トレジスト膜１３の中で、紫外光で露光された部分は、
非露光部に比べて耐熱性が低下する。この後、１３０℃
で３０分間の熱処理を施すことにより、レジスト開口部
１４０周辺近傍にあり紫外光で照射された領域のホトレ
ジストが流れ出す。この結果、第１図（ｃ）で示すよう
に側壁を傾斜面とされたレジスト開口部１７が形成され
る。Next, as shown in FIG. 2 (+), the photoresist film 13
A photomask 16 is placed on top of the photomask 16 so that the region including the resist opening 14 and facing a predetermined region wider than the resist opening 14 is transparent. Exposure is performed with light 16. In the photoresist film 13, the portion exposed to ultraviolet light is
Heat resistance is lower than that of the non-exposed area. After this, 130℃
By performing heat treatment for 30 minutes, the photoresist in the area near the resist opening 140 and irradiated with ultraviolet light flows out. As a result, a resist opening 17 having an inclined side wall is formed as shown in FIG. 1(c).
なお、上記のノボラック系ホトレジストの紫外光で露光
されない部分は１ ３０℃で３０分間の熱処理に対して
は、充分な耐熱性を持っているが、１５０”にで３０分
間の熱処理にだいしては、耐熱性か少し７劣化し、わず
かにレジストがフロー し始める。一方、紫外光で露光
され／こ部分の耐熱性は、１２０°ＣＫ ｔ テ低下１
〜．１３０”にで３０分間の熱処理によりフローする。Note that the part of the above novolac photoresist that is not exposed to ultraviolet light has sufficient heat resistance for heat treatment at 130°C for 30 minutes; , the heat resistance deteriorates a little by 7, and the resist begins to flow slightly.On the other hand, the heat resistance of the area exposed to ultraviolet light decreases by 120°CK 1.
~． Flow by heat treatment at 130" for 30 minutes.
したがって、上記のように１３０°Ｃで３０分間の熱処
理条件の下でＵＪｌ、し゛ シスト開１１部１４周辺
に位置］ッ、紫外光で露光されたレジスト部分のみがフ
ローシ、非露光部のレジス） ｉＪ：熱変形しない。こ
のため選択された。開口部の１ｔｉ１１壁のみを傾制し
た面形状とすることができる。−まだ、開口部周辺にあ
るレジスト層の紫外光領域の広さを制御することにより
、形成される側壁面の傾斜角度とレジスト開口部のパタ
ーン幅を高い精度で制御できる。Therefore, under the heat treatment conditions of 130°C for 30 minutes as described above, only the resist portions exposed to ultraviolet light (located around the resist opening 11 and 14) are flowed, and the non-exposed portions of the resist). iJ: No thermal deformation. It was selected for this reason. Only the 1ti11 walls of the opening can have an inclined surface shape. - By controlling the width of the ultraviolet light region of the resist layer around the opening, the inclination angle of the formed sidewall surface and the pattern width of the resist opening can be controlled with high precision.
さらに、ホトマスク１５のパターンの設定により特定の
開ロバターンの周辺のみを選択的に露光することにより
、レジストパターンの特定の開口部の側壁のみを傾斜の
ついた側壁形状とすることができる。Further, by selectively exposing only the periphery of a specific open pattern by setting the pattern of the photomask 15, only the sidewall of a specific opening in the resist pattern can be formed into a sloped sidewall shape.
このようにして、開口部の側壁が傾斜面とされだレジス
トパターンを使って反応性イオン・エツチング（ＲＩＥ
）により、ホトレジスト膜と酸化シリコン膜に対するエ
ツチングレートが等しく、かつ、異方性のエツチング処
理を施すことにより、第３図に示しだようなレジストパ
ターンと相似なコンタクト窓を酸化シリコン膜に形成す
ることができる。In this way, the sidewalls of the openings are etched by reactive ion etching (RIE) using the sloped surfaces and the exposed resist pattern.
), a contact window similar to the resist pattern shown in Figure 3 is formed in the silicon oxide film by performing an anisotropic etching process in which the etching rate is the same for the photoresist film and the silicon oxide film. be able to.
なお、以上の説明ではノボラック系ホトレジスＩ・とじ
て東京応化製のノボラック系ホトレジスト（品番０ＦＰ
Ｒａｏ○）を例示しだが、シプレー社製のノボラック系
ホトレジスト（品番ＡＺ１３５ｏ■あるいはＡＺ２４０
０）など他の製品を用いることもできる。実験によると
、ＡＺ１３５０■あるいはＡＺ２４００では、紫外光に
より露光されないレジスト部分は１６０″Ｃで３０分間
の熱処理によりわずかフローし始め、一方、紫外光で露
光されたレジスト部分は１００°Ｃで３ｏ分間の熱処理
によりフローシ始めることが確認された。よって、紫外
光で露光１〜だ後の熱処理温度は、レジストの種類と側
壁傾斜角度にあわせて１００°Ｃ以−１１１５０°Ｃ以
下に設定するのが適当である。なお、露光するレジスト
領域が広く、熱処理温度が高いほど、レジストは流れや
すくなり側壁傾斜角度は小さくなる傾向を示す。したが
って、側壁傾斜角度は熱処理温度および露光する開１−
１部周辺のレジストの広さにより制御できる。In addition, in the above explanation, Novolac Photoresist I/Tojito is a Novolac Photoresist manufactured by Tokyo Ohka Co., Ltd. (product number 0FP).
Rao○) is shown as an example, but novolak photoresist manufactured by Shipley (product number AZ135o■ or AZ240) is used as an example.
Other products such as 0) can also be used. Experiments have shown that for AZ1350■ or AZ2400, resist areas not exposed to UV light begin to flow slightly after heat treatment at 160"C for 30 minutes, while resist areas exposed to UV light begin to flow slightly after heat treatment at 100"C for 30 minutes. It was confirmed that heat treatment causes flow. Therefore, it is appropriate to set the heat treatment temperature after the first exposure to ultraviolet light to between 100°C and -11150°C, depending on the type of resist and the sidewall inclination angle. Note that the wider the exposed resist area and the higher the heat treatment temperature, the easier the resist will flow and the sidewall inclination angle will become smaller.Therefore, the sidewall inclination angle is determined by the heat treatment temperature and the exposed aperture.
It can be controlled by the width of the resist around the first part.
なお、紫外光で露光されるレジスト領域の選択を、ホト
マスクにより行う例を述べたが、紫外線のビームで直接
的にレジストに選択露光させてもよい。Although an example has been described in which the resist regions to be exposed to ultraviolet light are selected using a photomask, the resist may be selectively exposed directly to a beam of ultraviolet light.
発明の効果
以」−のように本発明のホトレジストパターンの形成方
法によれば、熱処理条件および紫外光で露光する開口部
周辺のレジスト領域の広さの制御により開口部周辺のレ
ジスト部分関係表く側壁傾斜角度およびパターン幅が高
い精度で制御されたレジスト開口部をもつレジストパタ
ーンを形成することができる。しかも、レジストパター
ン中のすべてのレジスト開口部の側壁を傾斜面とするこ
とは勿論のこと、特定のレジスト開口部の側壁の１ｏ
、 。According to the method for forming a photoresist pattern of the present invention, as described in ``Effects of the Invention'', the relationship between the resist parts around the opening can be expressed by controlling the heat treatment conditions and the width of the resist area around the opening exposed to ultraviolet light. A resist pattern having a resist opening in which the sidewall inclination angle and pattern width are controlled with high precision can be formed. Moreover, not only the sidewalls of all the resist openings in the resist pattern are made to be sloped surfaces, but also the sidewalls of a particular resist opening are made to have sloped surfaces.
, .
みを傾斜面とすることができるため、金属配線層の断切
れ防止をはかる必要のある箇所は側壁傾斜角度をゆるく
し、パターン幅の精度が必要な箇所は、側壁傾斜角度を
急峻にするか、あるいは、傾斜を付けないようにしたレ
ジストパターンを形成することができる。Since the sidewall can be sloped, the sidewall slope angle should be made gentler in areas where it is necessary to prevent the metal wiring layer from breaking, and the sidewall slope angle should be steeper in areas where precision in pattern width is required. Alternatively, a resist pattern with no slope can be formed.
第１図は本発明のホトレジストパターンの形成方法を説
明するだめの処理工程図、第２図は従来のレジストパタ
ーンの形成方法を説明するだめの処理工程図、第３図は
側壁が傾斜面とされたレジストパターンを用いて形成し
た酸化シリコン膜のコンタクト窓を表わす断面図、第４
図は従来の形成方法において、開口部周辺のレジストの
量により開口部のレジストパターンが変化することを説
明するだめの断面図である。
１１ ・・・シリコン基板、１２・・・・酸化シリコン
膜、１３・・・・・ホトレジスト膜、１４・・・・・レ
ジスト開［］部、１６・・ ホトマスク、１６・ 紫外
光、１７ ・・側壁を傾斜面とされたレジスト開口部。
ａつ
一 城
城FIG. 1 is a process diagram for explaining the method of forming a photoresist pattern according to the present invention, FIG. 4 is a cross-sectional view showing a contact window of a silicon oxide film formed using a resist pattern obtained by
The figure is a cross-sectional view for explaining that in a conventional forming method, the resist pattern of the opening changes depending on the amount of resist around the opening. 11...Silicon substrate, 12...Silicon oxide film, 13...Photoresist film, 14...Resist open part, 16...Photomask, 16.Ultraviolet light, 17... A resist opening with a sloped side wall. atsuichi castle
Claims (1)
部を形成した後、少なくとも一部の端縁を含む前記開口
部の周囲近傍に位置する前記ホトレジスト膜部分を、波
長が３５０ｎｍ以上４５０ｎｍ以下の紫外光で露光し、
さらに１００℃以上１５０℃以下の温度で熱処理を施す
ことを特徴とするホトレジストパターンの形成方法。After forming an opening in a novolac-based photoresist film formed on a substrate, a portion of the photoresist film located near the periphery of the opening, including at least a part of the edge, is exposed to ultraviolet light having a wavelength of 350 nm or more and 450 nm or less. Exposure with
A method for forming a photoresist pattern, further comprising performing heat treatment at a temperature of 100°C or more and 150°C or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60006964A JPS61166130A (en) | 1985-01-18 | 1985-01-18 | Formation of photoresist pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60006964A JPS61166130A (en) | 1985-01-18 | 1985-01-18 | Formation of photoresist pattern |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61166130A true JPS61166130A (en) | 1986-07-26 |
| JPH058567B2 JPH058567B2 (en) | 1993-02-02 |
Family
ID=11652888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60006964A Granted JPS61166130A (en) | 1985-01-18 | 1985-01-18 | Formation of photoresist pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61166130A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63261836A (en) * | 1987-04-20 | 1988-10-28 | Nec Corp | Formation of taper by reduction projection exposure |
| JPS63301521A (en) * | 1987-06-01 | 1988-12-08 | Nec Corp | Formation of pattern |
| US5096802A (en) * | 1990-11-09 | 1992-03-17 | Hewlett-Packard Company | Holes and spaces shrinkage |
| US5516626A (en) * | 1990-04-23 | 1996-05-14 | Tadahiro Ohmi | Resist processing method |
| US6956641B2 (en) | 2000-03-27 | 2005-10-18 | Oki Electric Industry, Co., Ltd. | Method of forming resist pattern, and exposure device |
| JP2016511544A (en) * | 2013-02-15 | 2016-04-14 | トランスフォーム インコーポレーテッド | Electrode of semiconductor device and manufacturing method thereof |
| CN106504981A (en) * | 2016-10-14 | 2017-03-15 | 电子科技大学 | A kind of method for preparing the controllable gentle slope micro structure of angle |
-
1985
- 1985-01-18 JP JP60006964A patent/JPS61166130A/en active Granted
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63261836A (en) * | 1987-04-20 | 1988-10-28 | Nec Corp | Formation of taper by reduction projection exposure |
| JPS63301521A (en) * | 1987-06-01 | 1988-12-08 | Nec Corp | Formation of pattern |
| JPH0558650B2 (en) * | 1987-06-01 | 1993-08-27 | Nippon Electric Co | |
| US5516626A (en) * | 1990-04-23 | 1996-05-14 | Tadahiro Ohmi | Resist processing method |
| US5096802A (en) * | 1990-11-09 | 1992-03-17 | Hewlett-Packard Company | Holes and spaces shrinkage |
| US6956641B2 (en) | 2000-03-27 | 2005-10-18 | Oki Electric Industry, Co., Ltd. | Method of forming resist pattern, and exposure device |
| JP2016511544A (en) * | 2013-02-15 | 2016-04-14 | トランスフォーム インコーポレーテッド | Electrode of semiconductor device and manufacturing method thereof |
| CN106504981A (en) * | 2016-10-14 | 2017-03-15 | 电子科技大学 | A kind of method for preparing the controllable gentle slope micro structure of angle |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH058567B2 (en) | 1993-02-02 |
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