JPH058567B2 - - Google Patents

Info

Publication number
JPH058567B2
JPH058567B2 JP60006964A JP696485A JPH058567B2 JP H058567 B2 JPH058567 B2 JP H058567B2 JP 60006964 A JP60006964 A JP 60006964A JP 696485 A JP696485 A JP 696485A JP H058567 B2 JPH058567 B2 JP H058567B2
Authority
JP
Japan
Prior art keywords
resist
opening
photoresist
pattern
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60006964A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61166130A (ja
Inventor
Yoshihiro Todokoro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP60006964A priority Critical patent/JPS61166130A/ja
Publication of JPS61166130A publication Critical patent/JPS61166130A/ja
Publication of JPH058567B2 publication Critical patent/JPH058567B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP60006964A 1985-01-18 1985-01-18 ホトレジストパタ−ンの形成方法 Granted JPS61166130A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60006964A JPS61166130A (ja) 1985-01-18 1985-01-18 ホトレジストパタ−ンの形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60006964A JPS61166130A (ja) 1985-01-18 1985-01-18 ホトレジストパタ−ンの形成方法

Publications (2)

Publication Number Publication Date
JPS61166130A JPS61166130A (ja) 1986-07-26
JPH058567B2 true JPH058567B2 (enrdf_load_stackoverflow) 1993-02-02

Family

ID=11652888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60006964A Granted JPS61166130A (ja) 1985-01-18 1985-01-18 ホトレジストパタ−ンの形成方法

Country Status (1)

Country Link
JP (1) JPS61166130A (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07107901B2 (ja) * 1987-04-20 1995-11-15 日本電気株式会社 縮小投影露光法によるテ−パ−形成方法
JPS63301521A (ja) * 1987-06-01 1988-12-08 Nec Corp パタ−ン形成法
JPH0427113A (ja) * 1990-04-23 1992-01-30 Tadahiro Omi レジスト処理装置、レジスト処理方法及びレジストパターン
US5096802A (en) * 1990-11-09 1992-03-17 Hewlett-Packard Company Holes and spaces shrinkage
JP2001274062A (ja) 2000-03-27 2001-10-05 Oki Electric Ind Co Ltd レジストパターンの形成方法及び露光装置
JP6522521B2 (ja) * 2013-02-15 2019-05-29 トランスフォーム インコーポレーテッド 半導体デバイスの電極及びその製造方法
CN106504981A (zh) * 2016-10-14 2017-03-15 电子科技大学 一种制备角度可控缓坡微结构的方法

Also Published As

Publication number Publication date
JPS61166130A (ja) 1986-07-26

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