JPS61120396A - マイクロ・プロセッサ - Google Patents

マイクロ・プロセッサ

Info

Publication number
JPS61120396A
JPS61120396A JP59241002A JP24100284A JPS61120396A JP S61120396 A JPS61120396 A JP S61120396A JP 59241002 A JP59241002 A JP 59241002A JP 24100284 A JP24100284 A JP 24100284A JP S61120396 A JPS61120396 A JP S61120396A
Authority
JP
Japan
Prior art keywords
memory
refresh
signal
request signal
refresh operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59241002A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0443355B2 (enrdf_load_stackoverflow
Inventor
Takahiro Tokuume
徳梅　孝啓
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59241002A priority Critical patent/JPS61120396A/ja
Priority to EP85107211A priority patent/EP0164735A3/en
Publication of JPS61120396A publication Critical patent/JPS61120396A/ja
Priority to US07/228,880 priority patent/US4924381A/en
Priority to US07/441,577 priority patent/US4965722A/en
Publication of JPH0443355B2 publication Critical patent/JPH0443355B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Microcomputers (AREA)
JP59241002A 1984-06-11 1984-11-15 マイクロ・プロセッサ Granted JPS61120396A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP59241002A JPS61120396A (ja) 1984-11-15 1984-11-15 マイクロ・プロセッサ
EP85107211A EP0164735A3 (en) 1984-06-11 1985-06-11 A microprocessor having a dynamic memory refresh circuit
US07/228,880 US4924381A (en) 1984-06-11 1988-08-05 Microprocessor having a dynamic memory refresh circuit
US07/441,577 US4965722A (en) 1984-06-11 1989-11-27 Dynamic memory refresh circuit with a flexible refresh delay dynamic memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59241002A JPS61120396A (ja) 1984-11-15 1984-11-15 マイクロ・プロセッサ

Publications (2)

Publication Number Publication Date
JPS61120396A true JPS61120396A (ja) 1986-06-07
JPH0443355B2 JPH0443355B2 (enrdf_load_stackoverflow) 1992-07-16

Family

ID=17067865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59241002A Granted JPS61120396A (ja) 1984-06-11 1984-11-15 マイクロ・プロセッサ

Country Status (1)

Country Link
JP (1) JPS61120396A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231090A (ja) * 1985-07-31 1987-02-10 Tokyo Juki Ind Co Ltd ダイナミツクｒａｍのリフレツシユ方式
JP2001184861A (ja) * 1999-11-23 2001-07-06 Robert Bosch Gmbh Ｄｒａｍのリフレッシュ方法及びマイクロコントローラ

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5178941A (en) * 1974-12-31 1976-07-09 Shimadzu Corp Konpyuutano ram rifuretsushuhoshiki
JPS544532A (en) * 1977-06-13 1979-01-13 Nec Corp Automatic refresh device of idle-time retrieval type
JPS5613587A (en) * 1979-07-11 1981-02-09 Toshiba Corp Refreshment system
JPS6194297A (ja) * 1984-10-16 1986-05-13 Matsushita Electric Ind Co Ltd ダイナミツクメモリ−のリフレツシユ装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5178941A (en) * 1974-12-31 1976-07-09 Shimadzu Corp Konpyuutano ram rifuretsushuhoshiki
JPS544532A (en) * 1977-06-13 1979-01-13 Nec Corp Automatic refresh device of idle-time retrieval type
JPS5613587A (en) * 1979-07-11 1981-02-09 Toshiba Corp Refreshment system
JPS6194297A (ja) * 1984-10-16 1986-05-13 Matsushita Electric Ind Co Ltd ダイナミツクメモリ−のリフレツシユ装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231090A (ja) * 1985-07-31 1987-02-10 Tokyo Juki Ind Co Ltd ダイナミツクｒａｍのリフレツシユ方式
JP2001184861A (ja) * 1999-11-23 2001-07-06 Robert Bosch Gmbh Ｄｒａｍのリフレッシュ方法及びマイクロコントローラ

Also Published As

Publication number Publication date
JPH0443355B2 (enrdf_load_stackoverflow) 1992-07-16

Similar Documents

Publication Publication Date Title
US4965722A (en) Dynamic memory refresh circuit with a flexible refresh delay dynamic memory
JPH11175391A (ja) フラッシュメモリにおける書込み／消去機能を拡張するための方法および装置
JPH06139189A (ja) 共有バス調停機構
US20030070049A1 (en) Memory control method, memory control circuit using the control method, and integrated circuit device with the memory control circuit
JP2000047974A (ja) バス制御コントローラのバス調停方法、バス制御コントローラ及び電子機器のシステム
US6272583B1 (en) Microprocessor having built-in DRAM and internal data transfer paths wider and faster than independent external transfer paths
JPH06214945A (ja) コンピュータシステム及び情報の高速転送方法
JPS61120396A (ja) マイクロ・プロセッサ
US5487157A (en) Microprogrammed microcomputer with high-speed interrupt for DRAM refresh
JPH051504B2 (enrdf_load_stackoverflow)
KR100217743B1 (ko) 공유메모리 접속장치 및 그 접속방법
US5790892A (en) Information handling system for modifying coherency response set to allow intervention of a read command so that the intervention is not allowed by the system memory
JPH09311812A (ja) マイクロコンピュータ
JPS60263395A (ja) マイクロ・プロセツサ
JPH08249289A (ja) メモリ制御装置およびその制御方法
JP2962431B2 (ja) プログラマブルコントローラ
KR0127559Y1 (ko) 버퍼를 이용한 메모리 엑세스 장치
KR960007835B1 (ko) 다중 프로세서의 공통 메모리 억세스 장치
JPH087562A (ja) ダイナミックランダムアクセスメモリ
JPH0981500A (ja) 仮想ｄｍａ転送方法
JPH06103026A (ja) メモリシステム
JPH11167519A (ja) メモリリフレッシュ制御回路、メモリ、メモリモジュー ル、デジタル装置
JPS63155254A (ja) 情報処理装置
JPS61183764A (ja) ダイレクトメモリアクセス制御方式
JPH11176165A (ja) シーケンシャルアクセス型半導体メモリ装置

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term