JPS5613587A - Refreshment system - Google Patents

Refreshment system

Info

Publication number
JPS5613587A
JPS5613587A JP8770879A JP8770879A JPS5613587A JP S5613587 A JPS5613587 A JP S5613587A JP 8770879 A JP8770879 A JP 8770879A JP 8770879 A JP8770879 A JP 8770879A JP S5613587 A JPS5613587 A JP S5613587A
Authority
JP
Japan
Prior art keywords
signal
memory
chip
access
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8770879A
Other languages
Japanese (ja)
Inventor
Satoru Yoshizato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8770879A priority Critical patent/JPS5613587A/en
Publication of JPS5613587A publication Critical patent/JPS5613587A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To manage without limitations of direct memory access on a bus by refreshing a memory when the access is not in process, by using a biaccess signal other than that of memory access to a corresponding memory. CONSTITUTION:An input-output access signal by input-output transfer through direct memory access DMA or by input output instructions of CPU chip 11 arrives at system bus 15 from a DMA chip or CPU11. On receiving this signal, the refresh timing circuit of memory control circuit 2 inputs a dummy signal to refresh address counter 24. The output of counter 24 is supplied as a refresh address to memory chip 25 by way of address selectors 22 and 21. On the other hand, an AND signal of a memory access signal and chip selective signal is supplied from circuit 23 to chip 25. Then, the refresh address is strobed and then chip 25 is refreshed and accessed. As a result, access to DMA is possible without limitations of memory refreshment.
JP8770879A 1979-07-11 1979-07-11 Refreshment system Pending JPS5613587A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8770879A JPS5613587A (en) 1979-07-11 1979-07-11 Refreshment system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8770879A JPS5613587A (en) 1979-07-11 1979-07-11 Refreshment system

Publications (1)

Publication Number Publication Date
JPS5613587A true JPS5613587A (en) 1981-02-09

Family

ID=13922405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8770879A Pending JPS5613587A (en) 1979-07-11 1979-07-11 Refreshment system

Country Status (1)

Country Link
JP (1) JPS5613587A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110093A (en) * 1982-12-15 1984-06-25 Mitsubishi Electric Corp Refreshing method of memory device
JPS60263395A (en) * 1984-06-11 1985-12-26 Nec Corp Microprocessor
JPS61120396A (en) * 1984-11-15 1986-06-07 Nec Corp Microprocessor
JPS62193799A (en) * 1986-02-20 1987-08-25 川崎重工業株式会社 Water-jet cutting method
JP2001184861A (en) * 1999-11-23 2001-07-06 Robert Bosch Gmbh Method for refreshing dram and microcontroller

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59110093A (en) * 1982-12-15 1984-06-25 Mitsubishi Electric Corp Refreshing method of memory device
JPS60263395A (en) * 1984-06-11 1985-12-26 Nec Corp Microprocessor
JPS61120396A (en) * 1984-11-15 1986-06-07 Nec Corp Microprocessor
JPH0443355B2 (en) * 1984-11-15 1992-07-16 Nippon Electric Co
JPS62193799A (en) * 1986-02-20 1987-08-25 川崎重工業株式会社 Water-jet cutting method
JPH032640B2 (en) * 1986-02-20 1991-01-16 Kawasaki Heavy Ind Ltd
JP2001184861A (en) * 1999-11-23 2001-07-06 Robert Bosch Gmbh Method for refreshing dram and microcontroller

Similar Documents

Publication Publication Date Title
JPS57105879A (en) Control system for storage device
JPS5613587A (en) Refreshment system
JPS57182257A (en) Data interchange system of data processing system
JPS5358736A (en) Input/output control system for mos dynamic random access memory
JPS5661087A (en) Control system for dynamic memory
JPS5547565A (en) Fourier conversion processing system
JPS55139691A (en) Memory circuit control system
JPS55108057A (en) Duplex control unit
JPS56118165A (en) Processor of video information
JPS54151333A (en) Memory system
JPS5611683A (en) Control system for refresh read-in write-in
JPS5587382A (en) Memory control system
JPS54142018A (en) Memory control system
JPS57103190A (en) Refreshment controller for random access memory
JPS56168256A (en) Data processor
JPS5687149A (en) Memory access control system
JPS564825A (en) Pulse input unit
ES8103407A1 (en) Data processing system
JPS5498125A (en) Control storage unit of computer
JPS5782267A (en) Address career device
JPS5442944A (en) Refresh address control system for memory
JPS55150032A (en) Data transfer system
JPS5478635A (en) Data transfer control circuit
JPS54133847A (en) Control system of memory unit
JPS559278A (en) Constitution system of bus line for information processor