JPS5498125A - Control storage unit of computer - Google Patents

Control storage unit of computer

Info

Publication number
JPS5498125A
JPS5498125A JP419778A JP419778A JPS5498125A JP S5498125 A JPS5498125 A JP S5498125A JP 419778 A JP419778 A JP 419778A JP 419778 A JP419778 A JP 419778A JP S5498125 A JPS5498125 A JP S5498125A
Authority
JP
Japan
Prior art keywords
address
bus
ram
memory
wcs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP419778A
Other languages
Japanese (ja)
Inventor
Juntaro Kamei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP419778A priority Critical patent/JPS5498125A/en
Publication of JPS5498125A publication Critical patent/JPS5498125A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To use effectively a WCS (writable control storage unit) without reducing the number of input/output devices which can be connected to an input/output bus, by connecting the WCS to a memory bus in the computer dependent upon the micro program control system. CONSTITUTION:WCS 15 equipped with control circuit 26, random access memory (RAM) 27 and AND gates 28 and 29 is connected to memory bus 24 through address bus 8 and data bus 9. RAM 27 has an address space for main memory 12 and puts and execution address on address bus 8 as the address contents of RAM 27 are used by a micro program, the address of read-only memory (ROM) address bus 6 is applied to RAM 27, and contents of RAM 27 are transferred to processing unit 1 as ROM data.
JP419778A 1978-01-20 1978-01-20 Control storage unit of computer Pending JPS5498125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP419778A JPS5498125A (en) 1978-01-20 1978-01-20 Control storage unit of computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP419778A JPS5498125A (en) 1978-01-20 1978-01-20 Control storage unit of computer

Publications (1)

Publication Number Publication Date
JPS5498125A true JPS5498125A (en) 1979-08-02

Family

ID=11577940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP419778A Pending JPS5498125A (en) 1978-01-20 1978-01-20 Control storage unit of computer

Country Status (1)

Country Link
JP (1) JPS5498125A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5549750A (en) * 1978-10-02 1980-04-10 Honeywell Inf Systems Control and memory unit for data processing system
JPS5878232A (en) * 1981-11-04 1983-05-11 Hitachi Ltd Microprogram controlling data processing device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5549750A (en) * 1978-10-02 1980-04-10 Honeywell Inf Systems Control and memory unit for data processing system
JPS6333177B2 (en) * 1978-10-02 1988-07-04 Haneiueru Infuoomeishon Shisutemusu Inc
JPS5878232A (en) * 1981-11-04 1983-05-11 Hitachi Ltd Microprogram controlling data processing device
JPH0115092B2 (en) * 1981-11-04 1989-03-15 Hitachi Ltd

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