JPS5778691A - Prefix conversion control system - Google Patents

Prefix conversion control system

Info

Publication number
JPS5778691A
JPS5778691A JP55155357A JP15535780A JPS5778691A JP S5778691 A JPS5778691 A JP S5778691A JP 55155357 A JP55155357 A JP 55155357A JP 15535780 A JP15535780 A JP 15535780A JP S5778691 A JPS5778691 A JP S5778691A
Authority
JP
Japan
Prior art keywords
adr4
address
prefix
adr5
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55155357A
Other languages
Japanese (ja)
Other versions
JPS6048789B2 (en
Inventor
Tsutomu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55155357A priority Critical patent/JPS6048789B2/en
Publication of JPS5778691A publication Critical patent/JPS5778691A/en
Publication of JPS6048789B2 publication Critical patent/JPS6048789B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To execute a high speed computation processing of a multiprocessor in a large electronic computer, by generating an absolute address of a main memory device through a prefix converting circuit only when the prefix conversion is required. CONSTITUTION:Contents of a real address which has been set to the first address register ADR4 are set to the second ADR5 directly, and also whether prefix conversion is required or not is checked. As a result, in case when the contents of the real address set to the first ADR4 is an address for which the prefix conversion is required, the contents of the address transferred to the second ADR5 are set to the first ADR4 over again, and after that, the prefix conversion is executed so as to be set to the second ADR5. Also, in case when the prefix conversion is not required with regard to the contents of the real address set to the first ADR4, they are set directly to the second ADR5 from the first ADR4.
JP55155357A 1980-11-05 1980-11-05 Prefix conversion control method Expired JPS6048789B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55155357A JPS6048789B2 (en) 1980-11-05 1980-11-05 Prefix conversion control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55155357A JPS6048789B2 (en) 1980-11-05 1980-11-05 Prefix conversion control method

Publications (2)

Publication Number Publication Date
JPS5778691A true JPS5778691A (en) 1982-05-17
JPS6048789B2 JPS6048789B2 (en) 1985-10-29

Family

ID=15604131

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55155357A Expired JPS6048789B2 (en) 1980-11-05 1980-11-05 Prefix conversion control method

Country Status (1)

Country Link
JP (1) JPS6048789B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01104284U (en) * 1987-12-29 1989-07-13

Also Published As

Publication number Publication date
JPS6048789B2 (en) 1985-10-29

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