JPS559278A - Constitution system of bus line for information processor - Google Patents

Constitution system of bus line for information processor

Info

Publication number
JPS559278A
JPS559278A JP8178078A JP8178078A JPS559278A JP S559278 A JPS559278 A JP S559278A JP 8178078 A JP8178078 A JP 8178078A JP 8178078 A JP8178078 A JP 8178078A JP S559278 A JPS559278 A JP S559278A
Authority
JP
Japan
Prior art keywords
strobe signal
memory unit
input
signal delivery
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8178078A
Other languages
Japanese (ja)
Inventor
Hajime Kakehi
Masaru Iizuka
Shuji Yoshida
Kenji Morosawa
Masahiro Hata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8178078A priority Critical patent/JPS559278A/en
Publication of JPS559278A publication Critical patent/JPS559278A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To perform access to the memory unit with less number of strobe signal lines, by separating the strobe signal delivery lines into those for memory unit and for input and output module, and performing skew compensation to the input and output module.
CONSTITUTION: The constitution of the bus line 4 of the information processing unit consisting of CPU1, memory unit 2, and input and output modules 3-1 and 3-2, is separated into the address read-in/write-in line 4a, data line 4b, strobe signal delivery line 4c, memory unit strobe signal delivery lime 4cm, and input and output unit strobe signal delivery line 4ci. The CPU 1 with this constitution is provided with the skew compensation unit 1a performing skew compensation to the signal delivery line 4ci to compensate the skew to the modules 3-1 and 3-2. The access time to the memory unit 2 is avoided from being affected with the number of the modules 3-1 and 3-2, and the connection of many modules is enabled by reducing the number of the strobe signal lines.
COPYRIGHT: (C)1980,JPO&Japio
JP8178078A 1978-07-05 1978-07-05 Constitution system of bus line for information processor Pending JPS559278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8178078A JPS559278A (en) 1978-07-05 1978-07-05 Constitution system of bus line for information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8178078A JPS559278A (en) 1978-07-05 1978-07-05 Constitution system of bus line for information processor

Publications (1)

Publication Number Publication Date
JPS559278A true JPS559278A (en) 1980-01-23

Family

ID=13755984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8178078A Pending JPS559278A (en) 1978-07-05 1978-07-05 Constitution system of bus line for information processor

Country Status (1)

Country Link
JP (1) JPS559278A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196333A (en) * 1981-05-26 1982-12-02 Toshiba Corp Interface controlling system
JPS6049892A (en) * 1983-08-27 1985-03-19 Sanki Tekko Kk Dehydrator

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143534B2 (en) * 1973-07-18 1976-11-22
JPS524136A (en) * 1975-06-30 1977-01-13 Hitachi Ltd Bus connection device
JPS5244125A (en) * 1975-10-03 1977-04-06 Hitachi Ltd Variable length interface circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143534B2 (en) * 1973-07-18 1976-11-22
JPS524136A (en) * 1975-06-30 1977-01-13 Hitachi Ltd Bus connection device
JPS5244125A (en) * 1975-10-03 1977-04-06 Hitachi Ltd Variable length interface circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196333A (en) * 1981-05-26 1982-12-02 Toshiba Corp Interface controlling system
JPS6049892A (en) * 1983-08-27 1985-03-19 Sanki Tekko Kk Dehydrator
JPS6137033B2 (en) * 1983-08-27 1986-08-21 Sanki Tetsuko Kk

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