JPS559277A - Information processor - Google Patents

Information processor

Info

Publication number
JPS559277A
JPS559277A JP8177978A JP8177978A JPS559277A JP S559277 A JPS559277 A JP S559277A JP 8177978 A JP8177978 A JP 8177978A JP 8177978 A JP8177978 A JP 8177978A JP S559277 A JPS559277 A JP S559277A
Authority
JP
Japan
Prior art keywords
unit
bus line
modules
input
given
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8177978A
Other languages
Japanese (ja)
Inventor
Shuji Yoshida
Kenji Morosawa
Masahiro Hata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8177978A priority Critical patent/JPS559277A/en
Publication of JPS559277A publication Critical patent/JPS559277A/en
Pending legal-status Critical Current

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  • Information Transfer Systems (AREA)

Abstract

PURPOSE: To reduce the effect given to the processing speed of the system, by providing the circuit inhibiting the delivery of strobe signal from CPU to the second unit for a given time greater than the callout time to the input and output module with the coupling section of the extension bus line of the first unit.
CONSTITUTION: The first unit 1 including CPU2, and input and output modules 3-11...3-13 is connected to the second unit 6 having only the input and output modules 3-21...3-23 with the extension bus line 5. The coupling section of the bus line 5 of the unit 1 is provided with the circuit inhibiting the delivery of the storobe signal to the modules 3-21...3-23 in the unit 6 from CPU 2 for a given time greater than the access time to the modules 3-11...3-13 of the unit 1. Thus, the presence of the extension bus line reduces the effect given to the processing speed of the system.
COPYRIGHT: (C)1980,JPO&Japio
JP8177978A 1978-07-05 1978-07-05 Information processor Pending JPS559277A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8177978A JPS559277A (en) 1978-07-05 1978-07-05 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8177978A JPS559277A (en) 1978-07-05 1978-07-05 Information processor

Publications (1)

Publication Number Publication Date
JPS559277A true JPS559277A (en) 1980-01-23

Family

ID=13755956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8177978A Pending JPS559277A (en) 1978-07-05 1978-07-05 Information processor

Country Status (1)

Country Link
JP (1) JPS559277A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59178518A (en) * 1983-03-30 1984-10-09 Fujitsu Ltd Bus extending system
JPS61127000A (en) * 1984-11-24 1986-06-14 Ngk Insulators Ltd Slit roller type dehydrating device
JPH0224758A (en) * 1988-07-13 1990-01-26 Nec Corp Logical circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524136A (en) * 1975-06-30 1977-01-13 Hitachi Ltd Bus connection device
JPS5244125A (en) * 1975-10-03 1977-04-06 Hitachi Ltd Variable length interface circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524136A (en) * 1975-06-30 1977-01-13 Hitachi Ltd Bus connection device
JPS5244125A (en) * 1975-10-03 1977-04-06 Hitachi Ltd Variable length interface circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59178518A (en) * 1983-03-30 1984-10-09 Fujitsu Ltd Bus extending system
JPS6336022B2 (en) * 1983-03-30 1988-07-18 Fujitsu Ltd
JPS61127000A (en) * 1984-11-24 1986-06-14 Ngk Insulators Ltd Slit roller type dehydrating device
JPH0224758A (en) * 1988-07-13 1990-01-26 Nec Corp Logical circuit

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