JPS605572A - Manufacture of high speed semiconductor device - Google Patents

Abstract

PURPOSE:To enable to manufacture a semiconductor device using an InAs having large electron mobility without alloy scattering as an operating layer by crystal growing GaSb in 2mum or more on a semi-insulating GaAs substrate, and growing a multilayer crystals of single or multilayers having equal lattice constant to that of the GaSb on the GaSb layer. CONSTITUTION:GaAs 2 is grown in 2mum or more by a molecule beam epitaxial growing method on a semi-insulating GaAs substrate 1. Then, an AlSb layer 3 is grown in 0.5mum, an InAs layer 4 undoped with am impurity is grown in 1mum, an AlSb layer 3 is grown in 0.5mum, an InAs layer 4 undoped with an impurity is grown in 1mum, an AlSb layer 5 is grown in 0.5mum, and an Al film 6 is grown in 0.4mum on the GaSb 2. Then, the film 6 is removed by photoetching except one region 7, and a gate electrode 7 is formed. Then, two regions disposed at opposite side to the electrode 7 are etched until reaching the layer 4, and Au ohmic electrodes 8, 9 are eventually formed on the two regions.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a compound semiconductor device that operates at high speed.

(Prior art and its problems) Devices using GaAs have high electron mobility, and semi-insulating GaAs substrates can be obtained.
High-speed operation is achieved compared to devices using Si. In order to obtain even higher electron mobility than GaAs, I
nx Gal-X As (x = 0.53)
A denoise method has been reported using , but very high electron mobility has not been obtained. This is Inx Ga 1
-X This is thought to be due to alloy scattering in the As mixed crystal.

In addition, the binary compound semiconductor InAs has no alloy scattering and can be expected to have high electron mobility;
The present invention provides a method for manufacturing a semiconductor device using InAs as an active layer, which is free from total scattering and has high electron mobility, which would result in a high-quality semi-insulating substrate with lattice matching.

Hereinafter, it will be explained in detail using Examples.

First, as shown in FIG. 1(a), GaSb 2 was deposited on a semi-insulating GaAs substrate 1 at a thickness of 2 μm using the molecular beam epitaxial method.
grow more than m.

Next, on this GaSb 2, an AlSb layer 3 with a thickness of 0.5 μm is formed.
InAs layer 4 not doped with impurities is 1μ7F+
, the AlSb layer 5 is 0.1. ttm, Al film 6 is 0
．． 4. μtn is grown (FIG. 1(b)). Next, the first
As shown in Figure (c), the Al film 6 except for one region 7 is removed by photo-etching to form a gate electrode 7. Next, two regions on opposite sides of the gate electrode 7 are etched until reaching the InAs layer 4 (FIG. 1(d)), and finally, Au ohmic electrodes 8.9 are formed in these two regions (Fig. 1(d)). Figure 1(e)).

In this way, the desired high-speed semiconductor device is obtained.

In FIG. 1(a), the Ga Sb layer 2 is made to have a thickness of 2μ or more and is exposed to 'Xz. FIG. 2 shows the relationship between the film thickness of GaSb.

In Fig. 1(b), Al
AI continues from the Sb layer! The reason why the film 6 is grown is that AlSb (AlSb) is very easily oxidized and an oxide film is quickly formed on the surface in the atmosphere.

Next, the high-speed operability of the field effect I transistor manufactured according to the present invention will be explained.

Figure 3 is an energy band diagram at the heterointerface between AlSb and InAs, (a) when there is no external electric field, and (b) when a positive voltage is applied to the AJSb side.
C) is an energy band diagram when a negative voltage is applied to the AlSb side.

In the field effect transistor according to this embodiment, AI! Sb
From the difference in band structure between and InAs, Figure 3 (,)
InAs shown at the interface between InAs and GaSb
Electrons accumulate on the sides, which contribute to electrical conduction.

By applying a voltage to the gate electrode 7, the band diagram changes as shown in FIGS. 8(b) and 8(c), and the current flowing between the ohmic electrodes 8 and 9 is modulated. The present invention provides a method for manufacturing a compound semiconductor device that operates faster than this semiconductor device.

It can be used in all fields where transistors and ICs are currently used, and its industrial applications are extremely wide, especially in fields that require high-speed processing, such as computer CPUs.
It can be expected to be used in memory image processing, etc.

The present invention is not limited to the element having the structure of this example.
It can be applied to all devices using a combination of materials with approximately the same lattice constant as GaSb, and semi-insulating GaAs
These devices can be realized using a substrate.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of a method for manufacturing a field effect transistor, which is an embodiment of the present invention, and shows the cross-sectional structure of the device at each stage of the process. Figure 2 shows GaS crystal grown on a GaAs substrate.
It is a figure which shows the layer thickness dependence of the relative mobility of b. Figure 3 is an energy band diagram at the heterointerface between Al5b and InAs, (a) when there is no external electric field, (b) when a positive voltage (positive on the AlSb side) is applied, (
c) 2 is a GaSb layer 3.5 is an AlSb layer 4 is an InAs layer 6 is an Al film 7 is a gate electrode 8.9 is an ohmic electrode. Patent applicant Hirobe Kawada, Director of the Agency of Industrial Science and Technology (a) (d) (b) (e) Figure 2

Claims (1)

[Claims] (1) A high-speed semiconductor device comprising the steps of growing a Garb crystal of 2 μm or more on a semi-insulating GaAs substrate, and growing a single-layer or multi-layer crystal having a lattice constant almost equal to that of GaSb on the GaSb layer. Production method. Part of the layer was removed, and finally the I nAs remaining after removal was removed.
A method of manufacturing a high-speed semiconductor device according to claim 1, characterized in that an ohmic electrode is provided on the layer.