JPS609174A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prepare a Schottky barrier having excellent characteristics, and to attain the effect of an improvement in characteristics in response to an FET, etc. by utilizing a semiconductor, which does not perform a lattice alignment but can form the high Schottky barrier, in opposition to a semiconductor, which can form only a low Schottky barrier. CONSTITUTION:An n type InGaAs layer 2 on a semi-insulating InP substrate 1 functions as a layer constituting an active channel for an FET, and represents an epitaxial growth layer consisting of a single crystal of In0.52Ga0.48As lattice-aligning with InP. The thickness of single one layer is each limited to approximately 100Angstrom at a maximum in an InGaAs layer and a GaAs layer in superlattice structure 3, and repeated laminated structure of desirably, approximately several dozen layers of at leat two layers or more is formed so that thickness in an extent that electrons do not generate tunnelling is obtained in the whole superlattice structure. The composition of the InGaAs layer may be the same as an active layer, but it may be changed gradually into a composition of In0.2Ga0.8As. A GaAs layer is used as an uppermost layer. A control electrode 4 forming a Schottky junction is made of a metal such as Al.

Description

Detailed Description of the Invention (FI) Technical Field of the Invention The present invention relates to a semiconductor device, and particularly to a field effect semiconductor device using a compound semiconductor layer with high electron mobility as an active layer and a Schottky electrode as a control electrode. .

(bl Background of the technology) Field-effect transistors (FETs) using GaAs have been put into practical use as devices capable of high-speed operation, and are expected to expand their application fields. InGaAs and the like are seen as promising compound semiconductors with even higher electron mobility.

In particular, a technique for epitaxially growing InGa' and As on an InP substrate with lattice matching is being established, and there are few yW points for practical use.

fc) Prior Art and Problems One of the difficulties in manufacturing an FET using I n Q 2ΔS lies in the control electrode (gate electrode). Ga71
+, s, a Schottky junction with good characteristics (barrier height of 0.7 to 0.8 eV) can be formed relatively easily, whereas a Schottky junction with good characteristics cannot be obtained with InGaAs. For example, InP substrate and lattice matching In
In the case of GaO YugAs, its surface barrier is fixed at 0.3-0.4, e V due to the surface states,
That is, a pinning effect occurs, and only a Schottky junction with the above barrier height can be formed regardless of the type of Schottky electrode metal.

Therefore, in order to configure EFT with InGaAs, MIS
It is generally considered to adopt a gate with a type structure. However, it is possible to obtain a stable gate insulating film with few interface states, such as the MO3 type gate in Si.
It is considered difficult to realize this.

(d) Purpose of the Invention The purpose of the present invention is to realize a control electrode for a Schottky junction with good characteristics in a semiconductor device whose active layer is a compound semiconductor such as InGaAs, in which it is difficult to form a Schottky junction with good characteristics. The objective is to provide a new structure for

(d) Structure of the Invention In order to achieve the above object, a semiconductor device provided by the present invention has a structure in which a depletion layer extending from a Schottky electrode can be expanded into a first compound semiconductor layer, A superlattice structure formed by repeatedly laminating a second compound semiconductor layer and a first compound semiconductor layer that is in contact with the Schottky electrode and forms a larger Schottky barrier than the first compound semiconductor is provided on the semiconductor layer. The Schottky electrode is provided in contact with the surface of the second compound semiconductor layer included in the superlattice structure.

([1 Embodiment of the Invention] FIG. 1 shows a structural cross section of a semiconductor device according to an embodiment of the invention. In the figure, 1 is a semi-insulating InP substrate.

2 is an n-type 1nGaAsJm, 3 is a superlattice structure consisting of InGaAstJi and a thin GaAs layer, and 4 is a control electrode ()
, ;-to electrode), and 5.6 are source and drain electrodes. The n-type InGaAs group on the semi-insulating InP substrate 1 is F
This layer constitutes the active channel of ET, and is an evixial growth layer of a single crystal of In'oGa and As, which is lattice-matched to InP. InGaA in superlattice structure 3
The maximum single layer thickness of the S layer and GaAs layer is approximately 100 mm.
The superlattice structure has a repeated laminated structure of at least two or more layers, preferably several tens of layers, so that the thickness is such that the entire superlattice structure does not cause electron tunneling.

The composition of InGaAsJFt may be the same as that of the active layer, but I
The composition may be gradually changed to no-LG ao, tr As. The top layer 1 is made of GaAsFi. This superlattice structure may be undoped, and by doping it to n-type, the width of the depletion layer extending inward from the Schottky junction formed thereon can be adjusted. The control electrode 4 forming the Schottky junction is made of AI, for example.

FIG. 2 shows a band diagram of a Schottky junction formed as in this example. In the figure, fl corresponding to each part in Figure 1
Areas are given the same reference numerals. InGaASI'ff1
Although L2 and GaAs1ill are not essentially lattice matched, the occurrence of dislocations due to mismatch is alleviated by the superlattice structure, and the influence of mismatch is especially alleviated on the uppermost surface crystal layer where a Schottky junction is to be formed. There is. The top surface is a thin layer of GaAs with (4'<AIF71
Schottky burr 1 formed by 1 is 0.7 to 0.8 e
G a A 's original barrier height is V. In this way, it becomes possible to introduce a Schottky barrier with good characteristics against GaAs into an InGaAs device.

As is well known, the ohmic electrodes 5 and 6 in the embodiment shown in FIG. .

(gl) Effects of the Invention According to the present invention, a Schottky barrier with good characteristics can be created by using a semiconductor that does not lattice match but can create a high Schottky barrier for a semiconductor that cannot create a low Schottky barrier. It is possible to achieve the characteristic improvement effect in response to FET etc.

[Brief explanation of drawings]

FIG. 1 is a structural sectional view of the device according to the embodiment of the present invention, and FIG. 2 is a band diagram of the Schottky joint. 1- Semi-insulating (nP substrate 2- N-type InGaAs active layer 3- InGaAs superlattice structure

Claims (1)

[Claims] It has a structure in which a depletion layer extending from a Schottky electrode can be expanded into a first compound semiconductor, and on the first compound semiconductor layer, in contact with the Schottky electrode, a Schossotchi halia larger than the first compound semiconductor is provided. A superlattice structure is provided in which a second compound semiconductor layer to be formed and a first compound semiconductor layer are repeatedly layered, and the Schottky electrode is provided in contact with a surface of the second compound semiconductor layer in the superlattice structure. A semiconductor device characterized by: