JPS6033446U - Icパツケ−ジ - Google Patents

Icパツケ−ジ

Info

Publication number
JPS6033446U
JPS6033446U JP1983123752U JP12375283U JPS6033446U JP S6033446 U JPS6033446 U JP S6033446U JP 1983123752 U JP1983123752 U JP 1983123752U JP 12375283 U JP12375283 U JP 12375283U JP S6033446 U JPS6033446 U JP S6033446U
Authority
JP
Japan
Prior art keywords
pad
lead frame
input
chip
negative logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983123752U
Other languages
English (en)
Inventor
信田 裕明
Original Assignee
住友電気工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 住友電気工業株式会社 filed Critical 住友電気工業株式会社
Priority to JP1983123752U priority Critical patent/JPS6033446U/ja
Publication of JPS6033446U publication Critical patent/JPS6033446U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は本考案によるICパッケージの部分的平面図、
第2図a、 bは負論理入力及び正論理入力の説明図で
ある。 図面中、1aは接地用リード板、1bは電源用リード板
、1cは信号入力用リード板、1a′。 lb’、lc’はパッド部、2はICチップ、2aは正
論理人力パッド、2bは負論理人力バッド、2cは正論
理処理用パッド、2dは負論理処理用パッド、3a、3
bはIC内配線、4a、4b、4c、4dはボンデング
ワイヤである。

Claims (1)

    【実用新案登録請求の範囲】
  1. リードフレームとその中央に配置されたICチップから
    なるICパッケージにおいて、上記リードフレームは、
    上記ICチップを隔てて配置された先端部に複数本のリ
    ード線をボンデングできる巾広のボンデングパッド部を
    備えた電源用リード板と、接地用リード板とを備えてい
    て、上記ICチップは、上記リードフレームの信号人力
    パッドに対向して正論理人力パッドと、負論理入力パッ
    ドと、該正論理人力パッドから分岐され上記接地用リー
    ド板のボンデングパッドに対向して設けられた正論理処
    理用パッドと、上記負論理人力パッドから分岐され、上
    記電源用リード板のボンデングパッドに対向して設けら
    れた負論理処理用パッドとを備え、外部から入力される
    信号が正論理入力あるいは負論理入力に対応して、正論
    理入力の場合は、上記ICチップの正論理人力パッドと
    上−記リードフレームの信号人力パッド並びに上記負論
    理処理用パッドと上記リードフレームの電源用リード板
    のボンデングパッドとをそれぞれワイヤボンデングし、
    負論理入力の場合は、上記ICチップの負論理入力パッ
    ドと上記リードフレームの信号入力パッド並びに上記正
    論理処理用パッドと上記リードフレームの接地用リード
    板のボンデングパッドとをそれぞれワイヤボンデングす
    ることを特徴とするICパッケージ。
JP1983123752U 1983-08-11 1983-08-11 Icパツケ−ジ Pending JPS6033446U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983123752U JPS6033446U (ja) 1983-08-11 1983-08-11 Icパツケ−ジ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983123752U JPS6033446U (ja) 1983-08-11 1983-08-11 Icパツケ−ジ

Publications (1)

Publication Number Publication Date
JPS6033446U true JPS6033446U (ja) 1985-03-07

Family

ID=30282369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983123752U Pending JPS6033446U (ja) 1983-08-11 1983-08-11 Icパツケ−ジ

Country Status (1)

Country Link
JP (1) JPS6033446U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020014321A (ja) * 2018-07-18 2020-01-23 東芝三菱電機産業システム株式会社 電力変換装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020014321A (ja) * 2018-07-18 2020-01-23 東芝三菱電機産業システム株式会社 電力変換装置

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