JPS6021971U - pulse identification circuit - Google Patents
pulse identification circuitInfo
- Publication number
- JPS6021971U JPS6021971U JP11385283U JP11385283U JPS6021971U JP S6021971 U JPS6021971 U JP S6021971U JP 11385283 U JP11385283 U JP 11385283U JP 11385283 U JP11385283 U JP 11385283U JP S6021971 U JPS6021971 U JP S6021971U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- identification circuit
- counter
- pulse identification
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Pulse Circuits (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１区は従来のパルス識別回路の構成を示すブロック図
、第２図は第１図の信号のタイミングを示す図、第３図
はこの考案の一実施例を示す図、第４図は第３図の信号
のタイミングを示す図である。図中１は被測定パルス、
２はモノマルチ回路、３はモノマルチ出力、４はフィル
タ回路、５はフィルタ出力、６は基準電圧、７は比較器
、８はパルス識別信号、９は基準パルス発生器、１０は
基準パルス、１．１はカウンタ、１２はリミット出力、
１３はフリップフロップ、１４はリセット信号発生器、
１５はリセット信号である。なお、図中同一あるいは相
当部分には、同一符号を付して示しである。Section 1 is a block diagram showing the configuration of a conventional pulse identification circuit, FIG. 2 is a diagram showing the timing of the signal in FIG. 1, FIG. 3 is a diagram showing an embodiment of this invention, and FIG. FIG. 4 is a diagram showing the timing of the signals in FIG. 3; 1 in the figure is the pulse to be measured,
2 is a mono multi circuit, 3 is a mono multi output, 4 is a filter circuit, 5 is a filter output, 6 is a reference voltage, 7 is a comparator, 8 is a pulse identification signal, 9 is a reference pulse generator, 10 is a reference pulse, 1.1 is the counter, 12 is the limit output,
13 is a flip-flop, 14 is a reset signal generator,
15 is a reset signal. Note that the same or corresponding parts in the figures are indicated by the same reference numerals.
Claims (1)
生器と、上記基準パルス発生器の基準パルスをカウント
するカウンタと、上記カウンタの内容かある特定の値に
なったときセットされるフリップフロップと、被測定パ
ルスが入力されたとき上記力・クンタ及びフリップフロ
ップの内容をリセットするリセット信号発生器より構成
される、パルス識別装置。a reference pulse generator that generates a reference pulse of a specific frequency; a counter that counts the reference pulses of the reference pulse generator; and a flip-flop that is set when the content of the counter reaches a specific value; A pulse identification device comprising a reset signal generator that resets the contents of the force/counter and flip-flop when a pulse to be measured is input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11385283U JPS6021971U (en) | 1983-07-22 | 1983-07-22 | pulse identification circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11385283U JPS6021971U (en) | 1983-07-22 | 1983-07-22 | pulse identification circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6021971U true JPS6021971U (en) | 1985-02-15 |
Family
ID=30263399
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11385283U Pending JPS6021971U (en) | 1983-07-22 | 1983-07-22 | pulse identification circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6021971U (en) |
-
1983
- 1983-07-22 JP JP11385283U patent/JPS6021971U/en active Pending
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