JPS5859239U - A/D converter - Google Patents
A/D converterInfo
- Publication number
- JPS5859239U JPS5859239U JP15422881U JP15422881U JPS5859239U JP S5859239 U JPS5859239 U JP S5859239U JP 15422881 U JP15422881 U JP 15422881U JP 15422881 U JP15422881 U JP 15422881U JP S5859239 U JPS5859239 U JP S5859239U
- Authority
- JP
- Japan
- Prior art keywords
- counter
- monostable multivibrator
- time constant
- converter
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来回路のブロック図、第２図は本考案による
一実施例のブロック図、第３図は第２図力動作を説明す
るための要部波形図である。
２・・・カウンタ、５・・・ラッチ回路、６・・・モノ
マルチ、７・・・信号処理回路。FIG. 1 is a block diagram of a conventional circuit, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a waveform diagram of main parts for explaining the power operation. 2... Counter, 5... Latch circuit, 6... Mono multi, 7... Signal processing circuit.
Claims (1)
あって、カウンタとラッチ回路と単安定マルチバイブレ
ークとを具倫し、該単安定マルチバイブレータの時定数
あるいは該時定数の印加電圧をアナログ信号として、該
単安定マルチバイブレータの動作期間中のみ該カウンタ
にクロック信号を供給し、そのカウンタの計数値をラッ
チしてディジタル信号とすることを特徴とするＡ／Ｄ変
換器。The configuration counts clock signals and latches the counted value, and incorporates a counter, a latch circuit, and a monostable multivibrator, and converts the time constant of the monostable multivibrator or the applied voltage of the time constant into an analog signal. An A/D converter, characterized in that a clock signal is supplied to the counter only during the operation period of the monostable multivibrator, and the count value of the counter is latched and converted into a digital signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15422881U JPS5859239U (en) | 1981-10-19 | 1981-10-19 | A/D converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15422881U JPS5859239U (en) | 1981-10-19 | 1981-10-19 | A/D converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5859239U true JPS5859239U (en) | 1983-04-21 |
Family
ID=29946827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15422881U Pending JPS5859239U (en) | 1981-10-19 | 1981-10-19 | A/D converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5859239U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5523694A (en) * | 1978-06-06 | 1980-02-20 | Morgan Smith Electronics | Analoggtoodigital converter |
-
1981
- 1981-10-19 JP JP15422881U patent/JPS5859239U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5523694A (en) * | 1978-06-06 | 1980-02-20 | Morgan Smith Electronics | Analoggtoodigital converter |
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