JPS59140520U

JPS59140520U - electronic volume

Info

Publication number: JPS59140520U
Application number: JP3474383U
Authority: JP
Inventors: 黒崎　正謙; 喜治植木; 安達　博夫; 尚菅沼
Original assignee: パイオニア株式会社
Priority date: 1983-03-09
Filing date: 1983-03-09
Publication date: 1984-09-19

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来一般に用いられている電子ポリューームの
一例を示す回路図、第２図はこの考案による電子ボリュ
ームの一実施例を示す回路図、第３図は第２図に示すデ
コーダと分周器の具体例を示す回路図である。　　− １・・・ダウンキー、２・・・アップキー、３・・・オ
アゲート、４・・・アンドゲート、５・・・発振器、６
・・・アップ・ダウンカウンタ、７・・・ディジタル・
アナログ変換器、８・・・デコーダ、９・・・分周回路
。Fig. 1 is a circuit diagram showing an example of an electronic volume commonly used in the past, Fig. 2 is a circuit diagram showing an example of an electronic volume according to this invention, and Fig. 3 is a circuit diagram showing the decoder and frequency divider shown in Fig. 2. FIG. 2 is a circuit diagram showing a specific example of the device. - 1... Down key, 2... Up key, 3... OR gate, 4... AND gate, 5... Oscillator, 6
...up/down counter, 7...digital
Analog converter, 8... decoder, 9... frequency dividing circuit.

Claims

[Scope of utility model registration request]

An up/down counter that counts down or up the clock pulses generated by the oscillator during the operation period of the down or up key, and a digital counter that converts the count output of this up/down counter into an analog value and outputs a control signal. An electronic volume having an analog converter, a decoder that converts the output of the up/down counter, and a frequency divider circuit that is provided at the output value of the oscillator and that varies a frequency division ratio according to the output of the decoder. An electronic volume that is characterized by being equipped with.