JPS58163018U - PCM adapter - Google Patents

PCM adapter

Info

Publication number
JPS58163018U
JPS58163018U JP6178882U JP6178882U JPS58163018U JP S58163018 U JPS58163018 U JP S58163018U JP 6178882 U JP6178882 U JP 6178882U JP 6178882 U JP6178882 U JP 6178882U JP S58163018 U JPS58163018 U JP S58163018U
Authority
JP
Japan
Prior art keywords
pcm
adapter
output
reference oscillator
fractional frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6178882U
Other languages
Japanese (ja)
Inventor
西尾　幸晃
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP6178882U priority Critical patent/JPS58163018U/en
Publication of JPS58163018U publication Critical patent/JPS58163018U/en
Pending legal-status Critical Current

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  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のＰＣＭアダプタのマスタークロック発生
回路を示す図、第２図は本考案に係るＰＣＭアダプタの
マスタークロック発生回路を示す図、第３図は分数分周
器の具体例を示す図、第４図はその動作波形図である。 １は基準発振器、６は分数分周器。Fig. 1 is a diagram showing a master clock generation circuit of a conventional PCM adapter, Fig. 2 is a diagram showing a master clock generation circuit of a PCM adapter according to the present invention, and Fig. 3 is a diagram showing a specific example of a fractional frequency divider. , FIG. 4 is a diagram of its operating waveforms. 1 is a reference oscillator, 6 is a fractional frequency divider.

Claims (1)

【実用新案登録請求の範囲】 アナログ信号をサンプリングしてＰＣＭ信号を得、この
ＰＣＭ信号を、ビデオテープレコーダを利用して記録可
能とすべく、ＰＡＬ方式のテレビジョン信号に変換する
構成としたＰＣＭアダプタであって、 １個の基準発振器と、分数分周器を設け、前記基準発振
器の出力を書込系マスタークロックとし、前記基準発振
器の出力を前記分数分周器にて分数分周した分周出力を
読出系マスタークロックとしたことを特徴とするＰＣＭ
アダプタ。[Claim for Utility Model Registration] A PCM configured to sample an analog signal to obtain a PCM signal and convert this PCM signal into a PAL television signal so that it can be recorded using a video tape recorder. The adapter is provided with one reference oscillator and a fractional frequency divider, the output of the reference oscillator is used as a write system master clock, and the output of the reference oscillator is divided by the fractional frequency by the fractional frequency divider. PCM characterized in that the frequency output is used as the readout system master clock.
adapter.
JP6178882U 1982-04-26 1982-04-26 PCM adapter Pending JPS58163018U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6178882U JPS58163018U (en) 1982-04-26 1982-04-26 PCM adapter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6178882U JPS58163018U (en) 1982-04-26 1982-04-26 PCM adapter

Publications (1)

Publication Number Publication Date
JPS58163018U true JPS58163018U (en) 1983-10-29

Family

ID=30071969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6178882U Pending JPS58163018U (en) 1982-04-26 1982-04-26 PCM adapter

Country Status (1)

Country Link
JP (1) JPS58163018U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753187A (en) * 1980-09-17 1982-03-30 Sony Corp Digitization of audio signal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753187A (en) * 1980-09-17 1982-03-30 Sony Corp Digitization of audio signal

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