JPS58189674U - VIR signal removal circuit - Google Patents
VIR signal removal circuitInfo
- Publication number
- JPS58189674U JPS58189674U JP8678182U JP8678182U JPS58189674U JP S58189674 U JPS58189674 U JP S58189674U JP 8678182 U JP8678182 U JP 8678182U JP 8678182 U JP8678182 U JP 8678182U JP S58189674 U JPS58189674 U JP S58189674U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal removal
- removal circuit
- signal
- vir signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Processing Of Color Television Signals (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はVIR信号の波形説明図、第2図は本考案の一
実施例を示す回路図、第3丙は同じく回路図、第4図は
第3図における要部波形図である。
第5図は従来例を示す回路ブロック図である。
主な図番の説明、3・・・AND回路、5・・・抜取パ
ルス作成回路、7・・・クリップ回路、10・・・LC
共振回路。FIG. 1 is an explanatory diagram of the waveform of the VIR signal, FIG. 2 is a circuit diagram showing an embodiment of the present invention, FIG. FIG. 5 is a circuit block diagram showing a conventional example. Explanation of main drawing numbers, 3...AND circuit, 5...Sampling pulse creation circuit, 7...Clip circuit, 10...LC
resonant circuit.
Claims (1)
、垂直同期信号と疑似垂直同期信号との論理積をとるA
ND回路と、該AND回路出力によりトリガされる抜取
パルス作成回路と、映像信号と前記抜取パルスを入力と
して輝度成分のみをクリップするクリップ回路とを備え
ることを特徴とするビデオテープレコーダーのVIR信
号除去回路。In the VIP signal removal circuit of a video tape recorder, A is used to AND the vertical synchronization signal and the pseudo vertical synchronization signal.
VIR signal removal for a video tape recorder, characterized by comprising an ND circuit, a sampling pulse generation circuit triggered by the output of the AND circuit, and a clip circuit that inputs a video signal and the sampling pulse and clips only the luminance component. circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8678182U JPS58189674U (en) | 1982-06-10 | 1982-06-10 | VIR signal removal circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8678182U JPS58189674U (en) | 1982-06-10 | 1982-06-10 | VIR signal removal circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58189674U true JPS58189674U (en) | 1983-12-16 |
JPH0411434Y2 JPH0411434Y2 (en) | 1992-03-23 |
Family
ID=30095549
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8678182U Granted JPS58189674U (en) | 1982-06-10 | 1982-06-10 | VIR signal removal circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58189674U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5447425A (en) * | 1977-09-21 | 1979-04-14 | Matsushita Electric Ind Co Ltd | Picture recorder/reproducer |
-
1982
- 1982-06-10 JP JP8678182U patent/JPS58189674U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5447425A (en) * | 1977-09-21 | 1979-04-14 | Matsushita Electric Ind Co Ltd | Picture recorder/reproducer |
Also Published As
Publication number | Publication date |
---|---|
JPH0411434Y2 (en) | 1992-03-23 |
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