JPS58127765U - Image signal sampling pulse generation circuit - Google Patents

Image signal sampling pulse generation circuit

Info

Publication number
JPS58127765U
JPS58127765U JP2397882U JP2397882U JPS58127765U JP S58127765 U JPS58127765 U JP S58127765U JP 2397882 U JP2397882 U JP 2397882U JP 2397882 U JP2397882 U JP 2397882U JP S58127765 U JPS58127765 U JP S58127765U
Authority
JP
Japan
Prior art keywords
image signal
sampling pulse
generation circuit
pulse generation
signal sampling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2397882U
Other languages
Japanese (ja)
Inventor
深山　美男
Original Assignee
株式会社精工舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社精工舎 filed Critical 株式会社精工舎
Priority to JP2397882U priority Critical patent/JPS58127765U/en
Publication of JPS58127765U publication Critical patent/JPS58127765U/en
Pending legal-status Critical Current

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  • Facsimile Image Signal Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示したブロック図である。 ２・・・・・・逓倍回路。 The drawing is a block diagram showing an embodiment of the present invention. 2... Multiplier circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 垂直同期信号、水平同期信号および画像信号を入力とし
、この画像信号をサンプリングする装置において、水平
同期信号の周波数を逓倍する逓倍回路を設け、この逓倍
回路の出力パルスを画像信号のサンプリングパルスとし
て用いることを特徴とする画像信号のサンプリングパル
ス発生回路。In a device that receives a vertical synchronization signal, a horizontal synchronization signal, and an image signal as input and samples the image signal, a multiplier circuit that multiplies the frequency of the horizontal synchronization signal is provided, and the output pulse of this multiplier circuit is used as the sampling pulse of the image signal. An image signal sampling pulse generation circuit characterized in that:
JP2397882U 1982-02-22 1982-02-22 Image signal sampling pulse generation circuit Pending JPS58127765U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2397882U JPS58127765U (en) 1982-02-22 1982-02-22 Image signal sampling pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2397882U JPS58127765U (en) 1982-02-22 1982-02-22 Image signal sampling pulse generation circuit

Publications (1)

Publication Number Publication Date
JPS58127765U true JPS58127765U (en) 1983-08-30

Family

ID=30035991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2397882U Pending JPS58127765U (en) 1982-02-22 1982-02-22 Image signal sampling pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS58127765U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6428069U (en) * 1987-08-07 1989-02-17

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6428069U (en) * 1987-08-07 1989-02-17

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