JPS5984962U - signal synthesis circuit - Google Patents
signal synthesis circuitInfo
- Publication number
- JPS5984962U JPS5984962U JP18047882U JP18047882U JPS5984962U JP S5984962 U JPS5984962 U JP S5984962U JP 18047882 U JP18047882 U JP 18047882U JP 18047882 U JP18047882 U JP 18047882U JP S5984962 U JPS5984962 U JP S5984962U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- synthesis circuit
- signal synthesis
- switch circuit
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Studio Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の信号合成回路の例を示す接続図、第2図
は本考案の一実施例を示す接続図、第3図 ゛はそ
の説明に供する線図である。
13.21及び25は夫々スイッチ回路、16は出力端
子である。゛FIG. 1 is a connection diagram showing an example of a conventional signal synthesis circuit, FIG. 2 is a connection diagram showing an embodiment of the present invention, and FIG. 3 is a diagram for explaining the same. 13, 21 and 25 are switch circuits, and 16 is an output terminal.゛
Claims (1)
給され、上記ビデオ信号に合成される第1の信号と同レ
ベルの信号が第2のスイッチ回路を通じて上記出力端子
に供給され、上記ビデオ信号に合成される第2の信号と
同レベルの信号が第3のスイッチ回路を通じて上記出力
端子に供給され、上記第1及び第2のスイッチ回路は上
記第1の信号で制御され、上記第3のスイッチ回路は上
記第2の信号で制御され、上記ビデオ信号に上記°第1
及び第2の信号が合成されるようになされた信号合成回
路。A video signal is supplied to the output terminal through a first switch circuit, and a signal having the same level as the first signal to be combined with the video signal is supplied to the output terminal through a second switch circuit and combined with the video signal. A signal having the same level as the second signal is supplied to the output terminal through a third switch circuit, the first and second switch circuits are controlled by the first signal, and the third switch circuit is controlled by the second signal, and the video signal is controlled by the first signal.
and a signal synthesis circuit configured to synthesize the second signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18047882U JPS5984962U (en) | 1982-11-29 | 1982-11-29 | signal synthesis circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18047882U JPS5984962U (en) | 1982-11-29 | 1982-11-29 | signal synthesis circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5984962U true JPS5984962U (en) | 1984-06-08 |
Family
ID=30391317
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18047882U Pending JPS5984962U (en) | 1982-11-29 | 1982-11-29 | signal synthesis circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5984962U (en) |
-
1982
- 1982-11-29 JP JP18047882U patent/JPS5984962U/en active Pending
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