JPS60109133U - semiconductor integrated circuit - Google Patents
semiconductor integrated circuitInfo
- Publication number
- JPS60109133U JPS60109133U JP20259483U JP20259483U JPS60109133U JP S60109133 U JPS60109133 U JP S60109133U JP 20259483 U JP20259483 U JP 20259483U JP 20259483 U JP20259483 U JP 20259483U JP S60109133 U JPS60109133 U JP S60109133U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor integrated
- integrated circuit
- reset
- initial value
- address counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の半導体集積回路とリセット信号選択回路
の一例のブロック図、第２図は第１図に示すリセット信
号選択回路の入出力信号のタイミング図、第３図は本考
案の一実施例のブロック図である。
１・・・・・・半導体集積回路、２・・・・・・リセッ
ト端子、３．４・・・・・・リセット信号、５・・・・
・・り峯ット信号選択回路、６・・・・・・出力信号、
１１・・・・・・半導体集積回路、１２．１３・・・・
・・リセット端子、１４・・・・・・アドレスカウンタ
。Fig. 1 is a block diagram of an example of a conventional semiconductor integrated circuit and a reset signal selection circuit, Fig. 2 is a timing diagram of input/output signals of the reset signal selection circuit shown in Fig. 1, and Fig. 3 is an implementation of the present invention. FIG. 2 is an example block diagram. 1...Semiconductor integrated circuit, 2...Reset terminal, 3.4...Reset signal, 5...
... Riminet signal selection circuit, 6... Output signal,
11... Semiconductor integrated circuit, 12.13...
...Reset terminal, 14...Address counter.
Claims (1)
、該リセット端子にそれぞれ接続する入力端子を有し前
記リセット信号別に初期値をセットし該セットされた初
期値に対応して内部回路をリセットするアドレスカウン
タとを含むことを特徴とする半導体集積回路。An address counter that has a plurality of reset terminals each inputting a reset signal, and an input terminal connected to each reset terminal, sets an initial value for each of the reset signals, and resets an internal circuit in accordance with the set initial value. A semiconductor integrated circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20259483U JPS60109133U (en) | 1983-12-27 | 1983-12-27 | semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20259483U JPS60109133U (en) | 1983-12-27 | 1983-12-27 | semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60109133U true JPS60109133U (en) | 1985-07-24 |
Family
ID=30765034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20259483U Pending JPS60109133U (en) | 1983-12-27 | 1983-12-27 | semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60109133U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6277132U (en) * | 1985-10-31 | 1987-05-18 |
-
1983
- 1983-12-27 JP JP20259483U patent/JPS60109133U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6277132U (en) * | 1985-10-31 | 1987-05-18 |
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