JPS6020695U - Input signal detection circuit - Google Patents
Input signal detection circuitInfo
- Publication number
- JPS6020695U JPS6020695U JP11333583U JP11333583U JPS6020695U JP S6020695 U JPS6020695 U JP S6020695U JP 11333583 U JP11333583 U JP 11333583U JP 11333583 U JP11333583 U JP 11333583U JP S6020695 U JPS6020695 U JP S6020695U
- Authority
- JP
- Japan
- Prior art keywords
- input signal
- signal detection
- detection circuit
- outputs
- certain period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例を示すブロック図、第２図は本考案の実
施例を示をブロック図、第３図は第２図の動作を示す波
形図である。
１・・・・・・インバータ、２・・・・・・バッファ、
３・・・・・・マイクロコンピュータ、４・・・・・・
モノマルチ回路、５′・・・・・・ラッチ回路。FIG. 1 is a block diagram showing a conventional example, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a waveform diagram showing the operation of FIG. 2. 1...Inverter, 2...Buffer,
3...Microcomputer, 4...
Mono multi circuit, 5'...latch circuit.
Claims (1)
ガされて一定時間のパルス信号を出力するモノマルチ回
路と、前記一定時間経過後前記インバータの出力をラッ
チするラッチ回路と、この出力信号をマイクロコンピュ
ータに出力するバッファとを有することを特徴とする入
力信号検出口an invanitor that inverts the input signal; a monomulti circuit that outputs a pulse signal for a certain period of time triggered by the input signal; a latch circuit that latches the output of the inverter after the elapse of the certain period; and a microcomputer that outputs this output signal. An input signal detection port characterized by having a buffer for outputting to the
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11333583U JPS6020695U (en) | 1983-07-21 | 1983-07-21 | Input signal detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11333583U JPS6020695U (en) | 1983-07-21 | 1983-07-21 | Input signal detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6020695U true JPS6020695U (en) | 1985-02-13 |
Family
ID=30262396
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11333583U Pending JPS6020695U (en) | 1983-07-21 | 1983-07-21 | Input signal detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6020695U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01137368U (en) * | 1988-03-08 | 1989-09-20 | ||
| JPH0489161U (en) * | 1991-02-01 | 1992-08-04 |
-
1983
- 1983-07-21 JP JP11333583U patent/JPS6020695U/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01137368U (en) * | 1988-03-08 | 1989-09-20 | ||
| JPH0489161U (en) * | 1991-02-01 | 1992-08-04 | ||
| JPH0519412Y2 (en) * | 1991-02-01 | 1993-05-21 |
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