JPS59193026U - detection circuit - Google Patents

detection circuit

Info

Publication number
JPS59193026U
JPS59193026U JP8710683U JP8710683U JPS59193026U JP S59193026 U JPS59193026 U JP S59193026U JP 8710683 U JP8710683 U JP 8710683U JP 8710683 U JP8710683 U JP 8710683U JP S59193026 U JPS59193026 U JP S59193026U
Authority
JP
Japan
Prior art keywords
detection
detection circuit
signal
detection means
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8710683U
Other languages
Japanese (ja)
Inventor
轟 茂夫
Original Assignee
日本コロムビア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本コロムビア株式会社 filed Critical 日本コロムビア株式会社
Priority to JP8710683U priority Critical patent/JPS59193026U/en
Publication of JPS59193026U publication Critical patent/JPS59193026U/en
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の検出手段からの検出信号を検知するため
の検出回路、第2図A、 Bは第1図の波形説明図、第
3図は本考案の検出手段からの検出信号を検知するため
の検知回路、第4図A−Dは第3図の波形説明図、第5
図は本考案の他の実施例を示す検出回路である。 1・・・検出手段、2・・・ライン、3・・・比較回路
、4・・・真の波形、5・・・ノイズ、6・・・入力端
子、7・・・インバータ回路、8・・・オアゲート回路
、9・・・肯定回路、10・・・ナントゲート回路。
Fig. 1 shows a detection circuit for detecting a detection signal from a conventional detection means, Fig. 2 A and B are waveform explanatory diagrams of Fig. 1, and Fig. 3 shows a detection circuit for detecting a detection signal from a detection means of the present invention. Detection circuit for detecting
The figure shows a detection circuit showing another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Detection means, 2... Line, 3... Comparison circuit, 4... True waveform, 5... Noise, 6... Input terminal, 7... Inverter circuit, 8... ...OR gate circuit, 9...affirmation circuit, 10...Nant gate circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 検出手段と、該検出手段に特定周波数パルス信号を供給
するパルス供給手段と、該検出手段によって生じた信号
に混入したノイズを含む信号とレベルを検出する比較手
段を具備し、上記比較手段出力と上記パルス供給手段出
力を論理回路に加えてノイズを含む信号のノイズを軽減
することを特徴とする検出回路。
It comprises a detection means, a pulse supply means for supplying a specific frequency pulse signal to the detection means, and a comparison means for detecting a signal including noise mixed in the signal generated by the detection means and a level, and the output of the comparison means and A detection circuit characterized in that the output of the pulse supply means is added to a logic circuit to reduce noise in a signal containing noise.
JP8710683U 1983-06-09 1983-06-09 detection circuit Pending JPS59193026U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8710683U JPS59193026U (en) 1983-06-09 1983-06-09 detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8710683U JPS59193026U (en) 1983-06-09 1983-06-09 detection circuit

Publications (1)

Publication Number Publication Date
JPS59193026U true JPS59193026U (en) 1984-12-21

Family

ID=30217028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8710683U Pending JPS59193026U (en) 1983-06-09 1983-06-09 detection circuit

Country Status (1)

Country Link
JP (1) JPS59193026U (en)

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