JPS5882039U - phase comparison circuit - Google Patents

phase comparison circuit

Info

Publication number
JPS5882039U
JPS5882039U JP17536181U JP17536181U JPS5882039U JP S5882039 U JPS5882039 U JP S5882039U JP 17536181 U JP17536181 U JP 17536181U JP 17536181 U JP17536181 U JP 17536181U JP S5882039 U JPS5882039 U JP S5882039U
Authority
JP
Japan
Prior art keywords
rectangular wave
receives
latch circuit
comparison circuit
phase comparison
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17536181U
Other languages
Japanese (ja)
Inventor
黒澤 雄二
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP17536181U priority Critical patent/JPS5882039U/en
Publication of JPS5882039U publication Critical patent/JPS5882039U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来の位相比較回路の一例の構成を示す回路
図、第2図は第1図に示した回路の動作例を示す波形図
、第3図は本考案の位相比較回路の一例を示す回路図、
第4図は第3図に示した回路の動作例を示す波形図であ
る。
FIG. 1 is a circuit diagram showing the configuration of an example of a conventional phase comparison circuit, FIG. 2 is a waveform diagram showing an example of the operation of the circuit shown in FIG. 1, and FIG. 3 is an example of the phase comparison circuit of the present invention. A circuit diagram showing,
FIG. 4 is a waveform diagram showing an example of the operation of the circuit shown in FIG. 3.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少なくとも2つの、位相を異にする矩形波信号を入力信
号とし、前記位相に応じて選択的にパルスを発生する位
相比較回路に於て、一方の矩形波信号を入力とするラッ
チ回路と、他方の矩形波信号を入力とするラッチ回路の
出力の論理積又は論理和を入力とするラッチ回路の出力
により、前記矩形波信号にケートすることを特徴機とす
る位相比較回路。
In a phase comparator circuit that receives at least two rectangular wave signals having different phases as input signals and selectively generates pulses according to the phases, the latch circuit receives one of the rectangular wave signals as input; 1. A phase comparator circuit characterized in that the output of the latch circuit receives the AND or OR of the outputs of the latch circuit that receives the rectangular wave signal as input, and converts the output of the latch circuit into the rectangular wave signal.
JP17536181U 1981-11-27 1981-11-27 phase comparison circuit Pending JPS5882039U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17536181U JPS5882039U (en) 1981-11-27 1981-11-27 phase comparison circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17536181U JPS5882039U (en) 1981-11-27 1981-11-27 phase comparison circuit

Publications (1)

Publication Number Publication Date
JPS5882039U true JPS5882039U (en) 1983-06-03

Family

ID=29967694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17536181U Pending JPS5882039U (en) 1981-11-27 1981-11-27 phase comparison circuit

Country Status (1)

Country Link
JP (1) JPS5882039U (en)

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