JPS58114598U - CCD input/output circuit - Google Patents
CCD input/output circuitInfo
- Publication number
- JPS58114598U JPS58114598U JP837182U JP837182U JPS58114598U JP S58114598 U JPS58114598 U JP S58114598U JP 837182 U JP837182 U JP 837182U JP 837182 U JP837182 U JP 837182U JP S58114598 U JPS58114598 U JP S58114598U
- Authority
- JP
- Japan
- Prior art keywords
- output circuit
- ccd
- input
- ccd input
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はＣＣＤ出力を示す波形図、第２図は本考案の入
出力回路の一実施例を示すブロック図、第３図は第２図
の出力を示す波形図である。
１０・・・・・・ＣＣＤのクロックパルス、２０・・・
・・・信号成分、１・・・・・・位相反転回路、２・・
・・・・ボルテージフォロア回路、３，４・・・・・・
ＣＣＤ、５・・・・・・引き算回路。FIG. 1 is a waveform diagram showing the CCD output, FIG. 2 is a block diagram showing an embodiment of the input/output circuit of the present invention, and FIG. 3 is a waveform diagram showing the output of FIG. 2. 10... CCD clock pulse, 20...
...Signal component, 1...Phase inversion circuit, 2...
...Voltage follower circuit, 3,4...
CCD, 5... Subtraction circuit.
Claims (1)
て逆相の信号を入力する第二〇ＣＣＤと、前記第一およ
び第二のＣＣＤの出力信号の差を取る引き算回路とを有
することを特徴とするＣＣＤ入出力回路。a first CCD into which a signal of positive phase is input; a second CCD into which a signal of opposite phase to said signal is input; and a subtraction circuit which takes the difference between the output signals of said first and second CCDs. A CCD input/output circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP837182U JPS58114598U (en) | 1982-01-25 | 1982-01-25 | CCD input/output circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP837182U JPS58114598U (en) | 1982-01-25 | 1982-01-25 | CCD input/output circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58114598U true JPS58114598U (en) | 1983-08-05 |
Family
ID=30021068
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP837182U Pending JPS58114598U (en) | 1982-01-25 | 1982-01-25 | CCD input/output circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58114598U (en) |
-
1982
- 1982-01-25 JP JP837182U patent/JPS58114598U/en active Pending
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