JPS5864137U - Frequency voltage conversion circuit - Google Patents
Frequency voltage conversion circuitInfo
- Publication number
- JPS5864137U JPS5864137U JP15807781U JP15807781U JPS5864137U JP S5864137 U JPS5864137 U JP S5864137U JP 15807781 U JP15807781 U JP 15807781U JP 15807781 U JP15807781 U JP 15807781U JP S5864137 U JPS5864137 U JP S5864137U
- Authority
- JP
- Japan
- Prior art keywords
- voltage conversion
- conversion circuit
- frequency voltage
- flop
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、本考案による周波数電圧変換回路の実施例を
示す回路図、第２図はディレイドタイプフリップフロッ
プの入力周波数と出力周波数との関係を示す特性図、第
３図イ〜ハはディレイドタイプフリップフロップの入力
信号と出力信号との関係を示すタイミングチャート、第
４図はディレイドタイプフリップフロップの入力信号の
周波数差と出力周波数との関係を示す図、第５図イルり
はシフトレジスタ及び検出回路の各部の波形を示す夕１
°ミングチャート、第６図は入力信号の周波数差と出力
電圧との関係を示す図、第７図は電圧比較器を示す図で
ある。
主な図番の説明、１． ３． ４・・・・・・ディレイ
ドタイプフリップフロップ、２・・・・・・シフトレジ
スタ、５・・・・・・検出回路、６・・・・・、ＮＡＮ
Ｄゲート、７・・・・・・インバータ、１０・・・・・
・積分回路、１１・・・・・・電圧比較器。Fig. 1 is a circuit diagram showing an embodiment of the frequency-voltage conversion circuit according to the present invention, Fig. 2 is a characteristic diagram showing the relationship between the input frequency and output frequency of a delayed type flip-flop, and Fig. 3 A to C are delayed type flip-flops. Figure 4 is a timing chart showing the relationship between the input signal and output signal of a delayed type flip-flop. Part 1 shows the waveforms of each part of the detection circuit.
FIG. 6 is a diagram showing the relationship between the frequency difference of input signals and the output voltage, and FIG. 7 is a diagram showing a voltage comparator. Explanation of main figure numbers, 1. 3. 4... Delayed type flip-flop, 2... Shift register, 5... Detection circuit, 6..., NAN
D gate, 7... Inverter, 10...
・Integrator circuit, 11... Voltage comparator.
Claims (1)
ック入力端子に印加されるディレイドタイプフリップフ
ロップと、該フリップフロップの出力信号を入力し基準
クロックパルスにより動作するシフトレジスタと、該シ
フトレジスタの状態を検出する検出回路と、該検出回路
の出力パルス列を入力する積分回路とより成り、前記第
１及び第２の入力信号の周波数差に応じた直流電圧を前
記積分回路の出力電圧として得るようにしたことを特徴
とする周波数電圧変換回路。a delayed type flip-flop to which the first and second input signals are applied to a data input terminal and a clock input terminal, respectively; a shift register that receives the output signal of the flip-flop and is operated by a reference clock pulse; It consists of a detection circuit that detects the state and an integration circuit that inputs the output pulse train of the detection circuit, and is configured to obtain a DC voltage according to the frequency difference between the first and second input signals as the output voltage of the integration circuit. A frequency-voltage conversion circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15807781U JPS5864137U (en) | 1981-10-22 | 1981-10-22 | Frequency voltage conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15807781U JPS5864137U (en) | 1981-10-22 | 1981-10-22 | Frequency voltage conversion circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5864137U true JPS5864137U (en) | 1983-04-30 |
Family
ID=29950579
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15807781U Pending JPS5864137U (en) | 1981-10-22 | 1981-10-22 | Frequency voltage conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5864137U (en) |
-
1981
- 1981-10-22 JP JP15807781U patent/JPS5864137U/en active Pending
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