JPS60132033U - pulse generator - Google Patents

pulse generator

Info

Publication number
JPS60132033U
JPS60132033U JP2040584U JP2040584U JPS60132033U JP S60132033 U JPS60132033 U JP S60132033U JP 2040584 U JP2040584 U JP 2040584U JP 2040584 U JP2040584 U JP 2040584U JP S60132033 U JPS60132033 U JP S60132033U
Authority
JP
Japan
Prior art keywords
pulse generator
pulse
signal
pulse width
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2040584U
Other languages
Japanese (ja)
Inventor
能智 政光
藤田 栄一
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2040584U priority Critical patent/JPS60132033U/en
Publication of JPS60132033U publication Critical patent/JPS60132033U/en
Pending legal-status Critical Current

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  • Pulse Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来のパルス発生器を示すブロック図、第2
図はこの考案の一実施例を示すブロック図、第3図は、
第2図の主要部分のタイムチャート、第4図はこの考案
の適用例を示すブロック図、第5図は第4図の主要部分
のタイムチャートである。 図において、6はカウンタ、7はキャリー信号、8はJ
−にフリップ・フロップ、9はパルス出力、10はゲー
ト、11はパルス波尾信号、12はパルス幅設定信号、
13はロード信号、14はクロック信号、15はパルス
発生器である。また、aはクロック信号14、bはロー
ド信号13、c(“よキャリー信号7、dはパルス出力
9、eはパルス波尾信号11の動きを示す。なお、図中
同一符号は、同一または相当部分を示すものとする。
Fig. 1 is a block diagram showing a conventional pulse generator, Fig. 2 is a block diagram showing a conventional pulse generator;
The figure is a block diagram showing one embodiment of this invention, and FIG.
FIG. 2 is a time chart of the main parts, FIG. 4 is a block diagram showing an example of application of this invention, and FIG. 5 is a time chart of the main parts of FIG. In the figure, 6 is a counter, 7 is a carry signal, and 8 is a J
- is a flip-flop, 9 is a pulse output, 10 is a gate, 11 is a pulse wave tail signal, 12 is a pulse width setting signal,
13 is a load signal, 14 is a clock signal, and 15 is a pulse generator. In addition, a indicates the clock signal 14, b indicates the load signal 13, c indicates the carry signal 7, d indicates the pulse output 9, and e indicates the movement of the pulse wave tail signal 11. In addition, the same reference numerals in the figure indicate the same or The corresponding portion shall be shown.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 外部より六ルス幅を示すパルス幅設定信号を取り込み、
その信号により、パルス幅を制御するカウンタと、上記
カウンタからのキャリー信号によりパルスの出力を制御
するJ−にフリップ・フロップとから構成されることを
特徴とするパルス発生器。
Receives a pulse width setting signal indicating six pulse width from the outside,
A pulse generator comprising: a counter that controls the pulse width according to the signal; and a flip-flop that controls the output of the pulse according to the carry signal from the counter.
JP2040584U 1984-02-15 1984-02-15 pulse generator Pending JPS60132033U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2040584U JPS60132033U (en) 1984-02-15 1984-02-15 pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2040584U JPS60132033U (en) 1984-02-15 1984-02-15 pulse generator

Publications (1)

Publication Number Publication Date
JPS60132033U true JPS60132033U (en) 1985-09-04

Family

ID=30510858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2040584U Pending JPS60132033U (en) 1984-02-15 1984-02-15 pulse generator

Country Status (1)

Country Link
JP (1) JPS60132033U (en)

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