JPS6087047U - Control device - Google Patents
Control deviceInfo
- Publication number
- JPS6087047U JPS6087047U JP17694483U JP17694483U JPS6087047U JP S6087047 U JPS6087047 U JP S6087047U JP 17694483 U JP17694483 U JP 17694483U JP 17694483 U JP17694483 U JP 17694483U JP S6087047 U JPS6087047 U JP S6087047U
- Authority
- JP
- Japan
- Prior art keywords
- controller
- control device
- counter
- output
- computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Executing Machine-Instructions (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の制御装置を示すブロック図、第２図は第
１図に示すものの各部の信号の例を示す図、第３図はこ
の考案による制御装置の一実施例 −を示す図、第４
図は第３図に示すものの各部の信号の例を示す図であり
、図において、１は計算機、２はカウンター、３は制御
器、４はフリップフロップ、５はプリセット・データ・
レジスタ、ｘ１〜Ｘ７は出力を示す。なお、図中同一あ
るいは相当部分には同一符号を付して示しである。FIG. 1 is a block diagram showing a conventional control device, FIG. 2 is a diagram showing examples of signals of each part of the device shown in FIG. 1, and FIG. 3 is a diagram showing an embodiment of the control device according to this invention. Fourth
The figure is a diagram showing an example of the signals of each part of the device shown in FIG.
Registers x1-X7 indicate outputs. It should be noted that the same or equivalent parts in the figures are indicated by the same reference numerals.
Claims (1)
低速な計算機と、前記低速な計算機の制御データを記憶
するプリセット・データ・レジスタと、前記プリセット
・データ拳レジスタの出力をロードするカウンタと、前
記カウンタの出力を受けて動作する制御器と、前記制御
器のエンドパルスを記憶するフリップフロップとを備え
たことを特徴とする制御装置。a computer that is slow compared to the processing speed of signals processed inside the controller; a preset data register that stores control data of the slow computer; and a counter that loads the output of the preset data register; A control device comprising: a controller that operates in response to an output from the counter; and a flip-flop that stores an end pulse of the controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17694483U JPS6087047U (en) | 1983-11-16 | 1983-11-16 | Control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17694483U JPS6087047U (en) | 1983-11-16 | 1983-11-16 | Control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6087047U true JPS6087047U (en) | 1985-06-15 |
Family
ID=30384550
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17694483U Pending JPS6087047U (en) | 1983-11-16 | 1983-11-16 | Control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6087047U (en) |
-
1983
- 1983-11-16 JP JP17694483U patent/JPS6087047U/en active Pending
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