JPS6142623U - reset circuit - Google Patents
reset circuitInfo
- Publication number
- JPS6142623U JPS6142623U JP12743484U JP12743484U JPS6142623U JP S6142623 U JPS6142623 U JP S6142623U JP 12743484 U JP12743484 U JP 12743484U JP 12743484 U JP12743484 U JP 12743484U JP S6142623 U JPS6142623 U JP S6142623U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- microcomputer
- outputs
- receives
- reset circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例の動作説明図、第２図は本考案の実施例
の回路図、第３図は同上の動作説明図である。
３・・・遅延回路、４・・・信号発生回路、５・・・リ
セット信号発生回路、６・・・マイクロコンピュータ。FIG. 1 is an explanatory diagram of the operation of the conventional example, FIG. 2 is a circuit diagram of the embodiment of the present invention, and FIG. 3 is an explanatory diagram of the same operation. 3...Delay circuit, 4...Signal generation circuit, 5...Reset signal generation circuit, 6...Microcomputer.
Claims (1)
信号を出力する遅延回路と、前記遅延回路の遅延信号を
受けて前記遅延信号が所定電圧以下の時に信号を出力す
る信号発生回路と、前記使号発生回路の出力信号を受け
てリセット信号を前記マイクロコンピュータに出力する
リセット信号発生回路とを備えてなることを特徴とする
りセツト回路。a delay circuit that receives a clock signal from a microcomputer and outputs a delayed signal; a signal generating circuit that receives a delayed signal from the delay circuit and outputs a signal when the delayed signal is below a predetermined voltage; and the symbol generating circuit. and a reset signal generating circuit which receives an output signal of the microcomputer and outputs a reset signal to the microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12743484U JPS6142623U (en) | 1984-08-22 | 1984-08-22 | reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12743484U JPS6142623U (en) | 1984-08-22 | 1984-08-22 | reset circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6142623U true JPS6142623U (en) | 1986-03-19 |
Family
ID=30686078
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12743484U Pending JPS6142623U (en) | 1984-08-22 | 1984-08-22 | reset circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6142623U (en) |
-
1984
- 1984-08-22 JP JP12743484U patent/JPS6142623U/en active Pending
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