JPS5978735U - Signal abnormality detection circuit - Google Patents
Signal abnormality detection circuitInfo
- Publication number
- JPS5978735U JPS5978735U JP17496282U JP17496282U JPS5978735U JP S5978735 U JPS5978735 U JP S5978735U JP 17496282 U JP17496282 U JP 17496282U JP 17496282 U JP17496282 U JP 17496282U JP S5978735 U JPS5978735 U JP S5978735U
- Authority
- JP
- Japan
- Prior art keywords
- abnormality detection
- signal
- detection circuit
- circuit
- signal abnormality
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、本考案の一実施例を示す信号異常検出回路図
、第２図は、第１図の回路の各部９信号波形図である。
ＴＭｉ・・・第１のタイマー回路、１Ｍ２・・・第２の
タイマー回路、Ｓ・・・ＯＲ回路。FIG. 1 is a signal abnormality detection circuit diagram showing an embodiment of the present invention, and FIG. 2 is a signal waveform diagram of each part of the circuit shown in FIG. 1. TMi...first timer circuit, 1M2...second timer circuit, S...OR circuit.
Claims (1)
から次の立上り時点までよりも長い継続時間を有する出
力信号を発生する第１のタイマー回路と、 入力信号の立下りによって駆動されて、この立下り時点
から次の立上り時点までよりも長い継続時間を右筆る出
力信号を発生する第２のタイマー回路と、 上記第１および第２のタイマー回路の出力信号の論理和
信号を出力するＯＲ回路と、 を有する信号異常検出回路。[Claims for Utility Model Registration] A first timer circuit that is driven by a rising edge of an input signal and generates an output signal having a longer duration from this rising edge point to the next rising edge point, and a falling edge of the input signal. a second timer circuit that is driven by a second timer circuit and generates an output signal having a longer duration from this falling point to the next rising point; and a logical sum of the output signals of the first and second timer circuits. A signal abnormality detection circuit comprising: an OR circuit that outputs a signal; and a signal abnormality detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17496282U JPS5978735U (en) | 1982-11-19 | 1982-11-19 | Signal abnormality detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17496282U JPS5978735U (en) | 1982-11-19 | 1982-11-19 | Signal abnormality detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5978735U true JPS5978735U (en) | 1984-05-28 |
Family
ID=30380766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17496282U Pending JPS5978735U (en) | 1982-11-19 | 1982-11-19 | Signal abnormality detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5978735U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5036537A (en) * | 1973-06-18 | 1975-04-05 |
-
1982
- 1982-11-19 JP JP17496282U patent/JPS5978735U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5036537A (en) * | 1973-06-18 | 1975-04-05 |
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