JPS60169960U - Clock signal extraction circuit - Google Patents
Clock signal extraction circuitInfo
- Publication number
- JPS60169960U JPS60169960U JP5813684U JP5813684U JPS60169960U JP S60169960 U JPS60169960 U JP S60169960U JP 5813684 U JP5813684 U JP 5813684U JP 5813684 U JP5813684 U JP 5813684U JP S60169960 U JPS60169960 U JP S60169960U
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- signal extraction
- extraction circuit
- delay
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の好ましい一具体例の回路図、第２図は
第１図に示す具体例の動作を説明するデータ等の説明図
、第３図は第１図に示す具体例の動作を説明するための
タイムチャートである。
２、 ３． ４．５・・・遅延素子、６・・・論理和回
路。FIG. 1 is a circuit diagram of a preferred specific example of the present invention, FIG. 2 is an explanatory diagram of data etc. explaining the operation of the specific example shown in FIG. 1, and FIG. 3 is an operation of the specific example shown in FIG. 1. It is a time chart for explaining. 2, 3. 4.5... Delay element, 6... OR circuit.
Claims (1)
に接続し、各遅延素子の出力を論理和回路の入力に接続
してなるクロック信号抽出回路。A clock signal extraction circuit comprising a plurality of delay elements having the same amount of delay electrically connected in series, and the output of each delay element connected to the input of an OR circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5813684U JPS60169960U (en) | 1984-04-20 | 1984-04-20 | Clock signal extraction circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5813684U JPS60169960U (en) | 1984-04-20 | 1984-04-20 | Clock signal extraction circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60169960U true JPS60169960U (en) | 1985-11-11 |
Family
ID=30583350
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5813684U Pending JPS60169960U (en) | 1984-04-20 | 1984-04-20 | Clock signal extraction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60169960U (en) |
-
1984
- 1984-04-20 JP JP5813684U patent/JPS60169960U/en active Pending
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