JPS60128695A - 基板のパタ−ン形成方法 - Google Patents

基板のパタ−ン形成方法

Info

Publication number
JPS60128695A
JPS60128695A JP59171657A JP17165784A JPS60128695A JP S60128695 A JPS60128695 A JP S60128695A JP 59171657 A JP59171657 A JP 59171657A JP 17165784 A JP17165784 A JP 17165784A JP S60128695 A JPS60128695 A JP S60128695A
Authority
JP
Japan
Prior art keywords
substrate
photosensitive material
ceramic
pattern
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59171657A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0213472B2 (enExample
Inventor
ダツドレイ・オーガスタス・チヤンス
チモシイ・クラーク・レイリー
マイケル・サムポグナ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS60128695A publication Critical patent/JPS60128695A/ja
Publication of JPH0213472B2 publication Critical patent/JPH0213472B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0272Adaptations for fluid transport, e.g. channels, holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0562Details of resist
    • H05K2203/0582Coating by resist, i.e. resist used as mask for application of insulating coating or of second resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12Using specific substances
    • H05K2203/128Molten metals, e.g. casting thereof, or melting by heating and excluding molten solder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Producing Shaped Articles From Materials (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Laminated Bodies (AREA)
JP59171657A 1983-12-14 1984-08-20 基板のパタ−ン形成方法 Granted JPS60128695A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US561373 1983-12-14
US06/561,373 US4555285A (en) 1983-12-14 1983-12-14 Forming patterns in metallic or ceramic substrates

Publications (2)

Publication Number Publication Date
JPS60128695A true JPS60128695A (ja) 1985-07-09
JPH0213472B2 JPH0213472B2 (enExample) 1990-04-04

Family

ID=24241675

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59171657A Granted JPS60128695A (ja) 1983-12-14 1984-08-20 基板のパタ−ン形成方法

Country Status (4)

Country Link
US (1) US4555285A (enExample)
EP (1) EP0144684B1 (enExample)
JP (1) JPS60128695A (enExample)
DE (1) DE3479618D1 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991011307A1 (fr) * 1990-01-25 1991-08-08 Dai Nippon Insatsu Kabushiki Kaisha Procede et matiere pour former des films epais textures
JP2008546542A (ja) * 2005-05-18 2008-12-25 プレジデント・アンド・フエローズ・オブ・ハーバード・カレツジ マイクロ流体ネットワークにおける伝導通路、マイクロ回路、マイクロ構造の製造
US7597813B2 (en) 2006-10-03 2009-10-06 Seiko Epson Corporation Element substrate and method of manufacturing the same
US7966720B2 (en) 2006-10-03 2011-06-28 Seiko Epson Corporation Method of manufacturing an element substrate

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4753694A (en) * 1986-05-02 1988-06-28 International Business Machines Corporation Process for forming multilayered ceramic substrate having solid metal conductors
DE3619871A1 (de) * 1986-06-13 1987-12-17 Siemens Ag Verfahren zur herstellung keramischen materials mit piezoelektrischen eigenschaften
US4828961A (en) * 1986-07-02 1989-05-09 W. R. Grace & Co.-Conn. Imaging process for forming ceramic electronic circuits
US5798469A (en) * 1992-12-29 1998-08-25 International Business Machines Corporation Non-sintering controlled pattern formation
DE4312976A1 (de) * 1993-04-21 1994-10-27 Bosch Gmbh Robert Kontaktierung von elektrisch leitenden Schichten eines Schichtsystems
US6074893A (en) * 1993-09-27 2000-06-13 Sumitomo Metal Industries, Ltd. Process for forming fine thick-film conductor patterns
EP4610240A1 (en) 2024-02-28 2025-09-03 CeramTec GmbH A millable paste for use in a method for obtaining cavity structures in a ceramic component, and a method for obtaining said cavity structures in ceramic components

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1219843B (de) * 1962-05-09 1966-06-23 Buntpapierfabrik A G Verfahren zum Dekorieren von nichtglasierten Rohscherben unter Verwendung keramischer Schiebebilder
DE1522515C2 (de) * 1965-08-03 1980-10-09 Du Pont Verfahren zur Herstellung gedruckter Schaltungen
US3526504A (en) * 1966-07-07 1970-09-01 Du Pont Photocrosslinkable elements and processes
US3469982A (en) * 1968-09-11 1969-09-30 Jack Richard Celeste Process for making photoresists
US3614834A (en) * 1969-09-09 1971-10-26 Us Air Force Extensometer for large diameter rods
US3615980A (en) * 1970-02-12 1971-10-26 Daniel J Rose Decal metallization of ceramic substrates
US3726002A (en) * 1971-08-27 1973-04-10 Ibm Process for forming a multi-layer glass-metal module adaptable for integral mounting to a dissimilar refractory substrate
US4353957A (en) * 1973-09-24 1982-10-12 Tam Ceramics Inc. Ceramic matrices for electronic devices and process for forming same
US3948706A (en) * 1973-12-13 1976-04-06 International Business Machines Corporation Method for metallizing ceramic green sheets
US3984244A (en) * 1974-11-27 1976-10-05 E. I. Du Pont De Nemours And Company Process for laminating a channeled photosensitive layer on an irregular surface
US4119480A (en) * 1976-05-13 1978-10-10 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing thick-film circuit devices
DE2854010A1 (de) * 1977-12-21 1979-07-05 Letraset International Ltd Verfahren zur herstellung von schildern
US4405394A (en) * 1980-05-27 1983-09-20 E. I. Du Pont De Nemours And Company Laminating process

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991011307A1 (fr) * 1990-01-25 1991-08-08 Dai Nippon Insatsu Kabushiki Kaisha Procede et matiere pour former des films epais textures
JP2008546542A (ja) * 2005-05-18 2008-12-25 プレジデント・アンド・フエローズ・オブ・ハーバード・カレツジ マイクロ流体ネットワークにおける伝導通路、マイクロ回路、マイクロ構造の製造
US7597813B2 (en) 2006-10-03 2009-10-06 Seiko Epson Corporation Element substrate and method of manufacturing the same
US7966720B2 (en) 2006-10-03 2011-06-28 Seiko Epson Corporation Method of manufacturing an element substrate

Also Published As

Publication number Publication date
EP0144684A2 (en) 1985-06-19
EP0144684B1 (en) 1989-08-30
US4555285A (en) 1985-11-26
EP0144684A3 (en) 1986-11-26
JPH0213472B2 (enExample) 1990-04-04
DE3479618D1 (en) 1989-10-05

Similar Documents

Publication Publication Date Title
JP3177211B2 (ja) プリント配線基板内のホールを充填する方法
US6204456B1 (en) Filling open through holes in a multilayer board
JPS6045097A (ja) 多層セラミツク基板の製造方法
US6350334B1 (en) Method of manufacturing a multi-layered ceramic substrate
JPS60128695A (ja) 基板のパタ−ン形成方法
JP3442200B2 (ja) プリント回路基板、プリント回路基板の製造方法
DE69605056T2 (de) Lötstopmaske zur herstellung gedruckter schaltungen
JP4740865B2 (ja) セラミック電子部品の製造方法
JP3080366B2 (ja) 無電解金属めっき法及び回路化構造体
JPH11186448A (ja) 積層セラミック回路基板の製造方法
JP2896296B2 (ja) セラミックス配線基板の製造方法
JP2003264361A (ja) 回路基板の製造方法
JP4407781B2 (ja) セラミック回路基板の製造方法
JP3709453B2 (ja) セラミックス多層配線基板の製造方法
JP2943767B2 (ja) 多層配線基板の製造方法
JPH0818236A (ja) 積層セラミック回路基板の製造方法
JP3823457B2 (ja) セラミックス配線基板の製造方法
JP3559310B2 (ja) 積層セラミック回路基板の製造方法
JPH10242620A (ja) セラミックス配線基板の製造方法
JPH0558667B2 (enExample)
JPH08213755A (ja) コンデンサ内蔵型積層セラミック回路基板及びその製造方法
JP3059689B2 (ja) 配線基板の製造方法
JPH09321411A (ja) セラミックス配線基板の製造方法
JP3152235B2 (ja) 電子部品の製造方法
JP2001102724A (ja) 配線基板の製造方法