DE3479618D1 - Forming patterns in metallic or ceramic substrates - Google Patents
Forming patterns in metallic or ceramic substratesInfo
- Publication number
- DE3479618D1 DE3479618D1 DE8484112875T DE3479618T DE3479618D1 DE 3479618 D1 DE3479618 D1 DE 3479618D1 DE 8484112875 T DE8484112875 T DE 8484112875T DE 3479618 T DE3479618 T DE 3479618T DE 3479618 D1 DE3479618 D1 DE 3479618D1
- Authority
- DE
- Germany
- Prior art keywords
- metallic
- ceramic substrates
- forming patterns
- patterns
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000919 ceramic Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
- H05K2203/0582—Coating by resist, i.e. resist used as mask for application of insulating coating or of second resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/12—Using specific substances
- H05K2203/128—Molten metals, e.g. casting thereof, or melting by heating and excluding molten solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Producing Shaped Articles From Materials (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Laminated Bodies (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/561,373 US4555285A (en) | 1983-12-14 | 1983-12-14 | Forming patterns in metallic or ceramic substrates |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE3479618D1 true DE3479618D1 (en) | 1989-10-05 |
Family
ID=24241675
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE8484112875T Expired DE3479618D1 (en) | 1983-12-14 | 1984-10-26 | Forming patterns in metallic or ceramic substrates |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4555285A (enExample) |
| EP (1) | EP0144684B1 (enExample) |
| JP (1) | JPS60128695A (enExample) |
| DE (1) | DE3479618D1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4753694A (en) * | 1986-05-02 | 1988-06-28 | International Business Machines Corporation | Process for forming multilayered ceramic substrate having solid metal conductors |
| DE3619871A1 (de) * | 1986-06-13 | 1987-12-17 | Siemens Ag | Verfahren zur herstellung keramischen materials mit piezoelektrischen eigenschaften |
| US4828961A (en) * | 1986-07-02 | 1989-05-09 | W. R. Grace & Co.-Conn. | Imaging process for forming ceramic electronic circuits |
| US5580511A (en) * | 1990-01-25 | 1996-12-03 | Dai Nippon Insatsu Kabushiki Kaisha | Method of forming thick film pattern and material for forming thick film pattern |
| US5798469A (en) * | 1992-12-29 | 1998-08-25 | International Business Machines Corporation | Non-sintering controlled pattern formation |
| DE4312976A1 (de) * | 1993-04-21 | 1994-10-27 | Bosch Gmbh Robert | Kontaktierung von elektrisch leitenden Schichten eines Schichtsystems |
| US6074893A (en) * | 1993-09-27 | 2000-06-13 | Sumitomo Metal Industries, Ltd. | Process for forming fine thick-film conductor patterns |
| WO2007061448A2 (en) * | 2005-05-18 | 2007-05-31 | President And Fellows Of Harvard College | Fabrication of conductive pathways, microcircuits and microstructures in microfluidic networks |
| JP4344954B2 (ja) * | 2006-10-03 | 2009-10-14 | セイコーエプソン株式会社 | 素子基板の製造方法 |
| JP2008091685A (ja) * | 2006-10-03 | 2008-04-17 | Seiko Epson Corp | 素子基板およびその製造方法 |
| EP4610240A1 (en) | 2024-02-28 | 2025-09-03 | CeramTec GmbH | A millable paste for use in a method for obtaining cavity structures in a ceramic component, and a method for obtaining said cavity structures in ceramic components |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1219843B (de) * | 1962-05-09 | 1966-06-23 | Buntpapierfabrik A G | Verfahren zum Dekorieren von nichtglasierten Rohscherben unter Verwendung keramischer Schiebebilder |
| DE1522515C2 (de) * | 1965-08-03 | 1980-10-09 | Du Pont | Verfahren zur Herstellung gedruckter Schaltungen |
| US3526504A (en) * | 1966-07-07 | 1970-09-01 | Du Pont | Photocrosslinkable elements and processes |
| US3469982A (en) * | 1968-09-11 | 1969-09-30 | Jack Richard Celeste | Process for making photoresists |
| US3614834A (en) * | 1969-09-09 | 1971-10-26 | Us Air Force | Extensometer for large diameter rods |
| US3615980A (en) * | 1970-02-12 | 1971-10-26 | Daniel J Rose | Decal metallization of ceramic substrates |
| US3726002A (en) * | 1971-08-27 | 1973-04-10 | Ibm | Process for forming a multi-layer glass-metal module adaptable for integral mounting to a dissimilar refractory substrate |
| US4353957A (en) * | 1973-09-24 | 1982-10-12 | Tam Ceramics Inc. | Ceramic matrices for electronic devices and process for forming same |
| US3948706A (en) * | 1973-12-13 | 1976-04-06 | International Business Machines Corporation | Method for metallizing ceramic green sheets |
| US3984244A (en) * | 1974-11-27 | 1976-10-05 | E. I. Du Pont De Nemours And Company | Process for laminating a channeled photosensitive layer on an irregular surface |
| US4119480A (en) * | 1976-05-13 | 1978-10-10 | Tokyo Shibaura Electric Co., Ltd. | Method of manufacturing thick-film circuit devices |
| DE2854010A1 (de) * | 1977-12-21 | 1979-07-05 | Letraset International Ltd | Verfahren zur herstellung von schildern |
| US4405394A (en) * | 1980-05-27 | 1983-09-20 | E. I. Du Pont De Nemours And Company | Laminating process |
-
1983
- 1983-12-14 US US06/561,373 patent/US4555285A/en not_active Expired - Fee Related
-
1984
- 1984-08-20 JP JP59171657A patent/JPS60128695A/ja active Granted
- 1984-10-26 EP EP84112875A patent/EP0144684B1/en not_active Expired
- 1984-10-26 DE DE8484112875T patent/DE3479618D1/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| EP0144684A2 (en) | 1985-06-19 |
| EP0144684B1 (en) | 1989-08-30 |
| US4555285A (en) | 1985-11-26 |
| EP0144684A3 (en) | 1986-11-26 |
| JPH0213472B2 (enExample) | 1990-04-04 |
| JPS60128695A (ja) | 1985-07-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |