JPS60117644A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS60117644A
JPS60117644A JP58224335A JP22433583A JPS60117644A JP S60117644 A JPS60117644 A JP S60117644A JP 58224335 A JP58224335 A JP 58224335A JP 22433583 A JP22433583 A JP 22433583A JP S60117644 A JPS60117644 A JP S60117644A
Authority
JP
Japan
Prior art keywords
main body
cap
glass layer
ceramic
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58224335A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0126538B2 (enFirst
Inventor
Susumu Kida
貴田　進
Isato Usami
宇佐美　勇人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58224335A priority Critical patent/JPS60117644A/ja
Publication of JPS60117644A publication Critical patent/JPS60117644A/ja
Publication of JPH0126538B2 publication Critical patent/JPH0126538B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP58224335A 1983-11-30 1983-11-30 半導体装置の製造方法 Granted JPS60117644A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58224335A JPS60117644A (ja) 1983-11-30 1983-11-30 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58224335A JPS60117644A (ja) 1983-11-30 1983-11-30 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60117644A true JPS60117644A (ja) 1985-06-25
JPH0126538B2 JPH0126538B2 (enFirst) 1989-05-24

Family

ID=16812141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58224335A Granted JPS60117644A (ja) 1983-11-30 1983-11-30 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60117644A (enFirst)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625647A (ja) * 1985-07-02 1987-01-12 Fujitsu Ltd 半導体装置の製造方法
US5059558A (en) * 1988-06-22 1991-10-22 North American Philips Corp., Signetics Division Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339859A (en) * 1976-09-24 1978-04-12 Hitachi Ltd Package
JPS5339857A (en) * 1976-09-22 1978-04-12 Siemens Ag Method of making injected domin in substrate
JPS5434765A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Manufacture of glass-sealed package

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5339857A (en) * 1976-09-22 1978-04-12 Siemens Ag Method of making injected domin in substrate
JPS5339859A (en) * 1976-09-24 1978-04-12 Hitachi Ltd Package
JPS5434765A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Manufacture of glass-sealed package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625647A (ja) * 1985-07-02 1987-01-12 Fujitsu Ltd 半導体装置の製造方法
US5059558A (en) * 1988-06-22 1991-10-22 North American Philips Corp., Signetics Division Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages

Also Published As

Publication number Publication date
JPH0126538B2 (enFirst) 1989-05-24

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