JPS5996798A - 多層厚膜回路の製造法 - Google Patents

多層厚膜回路の製造法

Info

Publication number
JPS5996798A
JPS5996798A JP58202901A JP20290183A JPS5996798A JP S5996798 A JPS5996798 A JP S5996798A JP 58202901 A JP58202901 A JP 58202901A JP 20290183 A JP20290183 A JP 20290183A JP S5996798 A JPS5996798 A JP S5996798A
Authority
JP
Japan
Prior art keywords
layer
thick film
infrared
layers
firing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58202901A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6323679B2 (show.php
Inventor
デイビツド・ケビン・フラツタリ−
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
REIDEIANTO TEKUNOROJII CORP
Original Assignee
REIDEIANTO TEKUNOROJII CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by REIDEIANTO TEKUNOROJII CORP filed Critical REIDEIANTO TEKUNOROJII CORP
Publication of JPS5996798A publication Critical patent/JPS5996798A/ja
Publication of JPS6323679B2 publication Critical patent/JPS6323679B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Conductive Materials (AREA)
JP58202901A 1982-11-03 1983-10-31 多層厚膜回路の製造法 Granted JPS5996798A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43891882A 1982-11-03 1982-11-03
US438918 1982-11-03

Publications (2)

Publication Number Publication Date
JPS5996798A true JPS5996798A (ja) 1984-06-04
JPS6323679B2 JPS6323679B2 (show.php) 1988-05-17

Family

ID=23742574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58202901A Granted JPS5996798A (ja) 1982-11-03 1983-10-31 多層厚膜回路の製造法

Country Status (2)

Country Link
EP (1) EP0108314A2 (show.php)
JP (1) JPS5996798A (show.php)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115394A (ja) * 1984-07-02 1986-01-23 東京プリント工業株式会社 ジヤンパ−層等を備えた複合プリント配線基板の積層方法
JPS61115376A (ja) * 1984-11-12 1986-06-02 伊勢電子工業株式会社 プリント基板の製造方法
JPS63213974A (ja) * 1987-03-03 1988-09-06 Matsushita Electric Ind Co Ltd 光起電力装置の製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0245500A4 (en) * 1985-11-13 1988-03-21 Radiant Technology Corp METHOD AND APPARATUS FOR THE RAPID REMOVAL OF ORGANIC MATERIALS CONTAINED IN FILMS BY HEATING IN AN ELECTRIC FIELD.
WO1988002183A1 (en) * 1986-09-19 1988-03-24 Hughes Aircraft Company Trimming passive components buried in multilayer structures
US4792779A (en) * 1986-09-19 1988-12-20 Hughes Aircraft Company Trimming passive components buried in multilayer structures
DE4446099A1 (de) * 1994-12-22 1996-10-02 Siemens Ag Mehrlagige hybridintegrierte Dickschichtschaltung
US6495800B2 (en) 1999-08-23 2002-12-17 Carson T. Richert Continuous-conduction wafer bump reflow system
AU7073100A (en) 1999-08-23 2001-03-19 Radiant Technology Corporation Continuous-conduction wafer bump reflow system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115394A (ja) * 1984-07-02 1986-01-23 東京プリント工業株式会社 ジヤンパ−層等を備えた複合プリント配線基板の積層方法
JPS61115376A (ja) * 1984-11-12 1986-06-02 伊勢電子工業株式会社 プリント基板の製造方法
JPS63213974A (ja) * 1987-03-03 1988-09-06 Matsushita Electric Ind Co Ltd 光起電力装置の製造方法

Also Published As

Publication number Publication date
JPS6323679B2 (show.php) 1988-05-17
EP0108314A2 (en) 1984-05-16

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