JPS5974673A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5974673A
JPS5974673A JP57183693A JP18369382A JPS5974673A JP S5974673 A JPS5974673 A JP S5974673A JP 57183693 A JP57183693 A JP 57183693A JP 18369382 A JP18369382 A JP 18369382A JP S5974673 A JPS5974673 A JP S5974673A
Authority
JP
Japan
Prior art keywords
mosfet
forming
oxide film
layer
polysilicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57183693A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0212030B2 (enrdf_load_stackoverflow
Inventor
Yasuo Nakai
康雄 中井
Minoru Kikuchi
菊地　実
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP57183693A priority Critical patent/JPS5974673A/ja
Publication of JPS5974673A publication Critical patent/JPS5974673A/ja
Publication of JPH0212030B2 publication Critical patent/JPH0212030B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP57183693A 1982-10-21 1982-10-21 半導体装置の製造方法 Granted JPS5974673A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57183693A JPS5974673A (ja) 1982-10-21 1982-10-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57183693A JPS5974673A (ja) 1982-10-21 1982-10-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5974673A true JPS5974673A (ja) 1984-04-27
JPH0212030B2 JPH0212030B2 (enrdf_load_stackoverflow) 1990-03-16

Family

ID=16140283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57183693A Granted JPS5974673A (ja) 1982-10-21 1982-10-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5974673A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179567A (ja) * 1984-09-28 1986-08-12 テキサス　インスツルメンツ　インコ−ポレイテツド 自己整合積層ｃｍｏｓ構造の製造方法
JPS62104071A (ja) * 1985-08-05 1987-05-14 テキサス　インスツルメンツ　インコ−ポレイテツド 垂直方向に集積した半導体装置を形成する方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028701U (enrdf_load_stackoverflow) * 1973-07-09 1975-04-02
JPS51433A (en) * 1974-06-21 1976-01-06 Ueyama Jitsugyo Kk Gorufurenshujono boorukaishusochi
JPS5785262A (en) * 1980-11-17 1982-05-27 Toshiba Corp Manufacture of metal oxide semiconductor type semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028701U (enrdf_load_stackoverflow) * 1973-07-09 1975-04-02
JPS51433A (en) * 1974-06-21 1976-01-06 Ueyama Jitsugyo Kk Gorufurenshujono boorukaishusochi
JPS5785262A (en) * 1980-11-17 1982-05-27 Toshiba Corp Manufacture of metal oxide semiconductor type semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179567A (ja) * 1984-09-28 1986-08-12 テキサス　インスツルメンツ　インコ−ポレイテツド 自己整合積層ｃｍｏｓ構造の製造方法
JPS62104071A (ja) * 1985-08-05 1987-05-14 テキサス　インスツルメンツ　インコ−ポレイテツド 垂直方向に集積した半導体装置を形成する方法

Also Published As

Publication number Publication date
JPH0212030B2 (enrdf_load_stackoverflow) 1990-03-16

Similar Documents

Publication Publication Date Title
JPS61179567A (ja) 自己整合積層ｃｍｏｓ構造の製造方法
JPH03173480A (ja) 基板の上に横たわる多層導電ラインを有する半導体装置を製作するための方法
JPH0355984B2 (enrdf_load_stackoverflow)
JPH039631B2 (enrdf_load_stackoverflow)
JPS61166075A (ja) 半導体装置およびその製造方法
US4560421A (en) Semiconductor device and method of manufacturing the same
JP3126573B2 (ja) 半導体装置及びその製造方法
JPS5846193B2 (ja) 半導体装置
JPS6113670A (ja) 薄膜電界効果トランジスタの製造方法およびその方法によつて得られるトランジスタ
JPS6360549B2 (enrdf_load_stackoverflow)
JPS5974673A (ja) 半導体装置の製造方法
JPH01151268A (ja) 半導体装置の製造方法
JPH03173175A (ja) 半導体装置
JPH09162392A (ja) 半導体装置
JPS63164357A (ja) 半導体装置の製造方法
JPS6074682A (ja) 半導体装置の製造方法
JPS59214263A (ja) 二重拡散形絶縁ゲ−ト電界効果トランジスタ
JPS6286752A (ja) 半導体集積回路の製造方法
JP2971083B2 (ja) 半導体装置
JPS59124767A (ja) 半導体・集積回路装置の製造方法
JPS5935464A (ja) 相補型ｍｏｓ半導体装置及びその製造方法
JP2556155B2 (ja) 半導体装置の製造方法
JPS6129176A (ja) 半導体装置の製造方法
JPS59175769A (ja) 半導体装置及びその製造方法
JPS63308963A (ja) 半導体装置およびその製造方法