JPS5971184A - 記憶装置 - Google Patents

記憶装置

Info

Publication number
JPS5971184A
JPS5971184A JP57181125A JP18112582A JPS5971184A JP S5971184 A JPS5971184 A JP S5971184A JP 57181125 A JP57181125 A JP 57181125A JP 18112582 A JP18112582 A JP 18112582A JP S5971184 A JPS5971184 A JP S5971184A
Authority
JP
Japan
Prior art keywords
bank
cache memory
memory
cache
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57181125A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0421222B2 (enrdf_load_stackoverflow
Inventor
Mamoru Umemura
梅村 護
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57181125A priority Critical patent/JPS5971184A/ja
Publication of JPS5971184A publication Critical patent/JPS5971184A/ja
Publication of JPH0421222B2 publication Critical patent/JPH0421222B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP57181125A 1982-10-15 1982-10-15 記憶装置 Granted JPS5971184A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57181125A JPS5971184A (ja) 1982-10-15 1982-10-15 記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57181125A JPS5971184A (ja) 1982-10-15 1982-10-15 記憶装置

Publications (2)

Publication Number Publication Date
JPS5971184A true JPS5971184A (ja) 1984-04-21
JPH0421222B2 JPH0421222B2 (enrdf_load_stackoverflow) 1992-04-09

Family

ID=16095295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57181125A Granted JPS5971184A (ja) 1982-10-15 1982-10-15 記憶装置

Country Status (1)

Country Link
JP (1) JPS5971184A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6174041A (ja) * 1984-09-18 1986-04-16 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション コンピュータ・メモリシステム
JPS61109146A (ja) * 1984-11-01 1986-05-27 Fujitsu Ltd 先行制御方式
JPS61267149A (ja) * 1985-05-21 1986-11-26 Nec Corp デ−タ処理装置
JPS6444557A (en) * 1987-08-12 1989-02-16 Hitachi Ltd Information processor
JP2005339348A (ja) * 2004-05-28 2005-12-08 Renesas Technology Corp 半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6174041A (ja) * 1984-09-18 1986-04-16 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション コンピュータ・メモリシステム
JPS61109146A (ja) * 1984-11-01 1986-05-27 Fujitsu Ltd 先行制御方式
JPS61267149A (ja) * 1985-05-21 1986-11-26 Nec Corp デ−タ処理装置
JPS6444557A (en) * 1987-08-12 1989-02-16 Hitachi Ltd Information processor
JP2005339348A (ja) * 2004-05-28 2005-12-08 Renesas Technology Corp 半導体装置
US8032715B2 (en) 2004-05-28 2011-10-04 Renesas Electronics Corporation Data processor

Also Published As

Publication number Publication date
JPH0421222B2 (enrdf_load_stackoverflow) 1992-04-09

Similar Documents

Publication Publication Date Title
US5091851A (en) Fast multiple-word accesses from a multi-way set-associative cache memory
JPS5830319Y2 (ja) コンピユ−タシステム
US5586294A (en) Method for increased performance from a memory stream buffer by eliminating read-modify-write streams from history buffer
US5404476A (en) Multiprocessing system having a single translation lookaside buffer with reduced processor overhead
JPS6118222B2 (enrdf_load_stackoverflow)
JP2561261B2 (ja) バッファ記憶アクセス方法
JPH0695972A (ja) ディジタルコンピュータシステム
JPS5971184A (ja) 記憶装置
JPH0282330A (ja) ムーブアウト・システム
JP2002041358A (ja) プロセッサシステム
US5933856A (en) System and method for processing of memory data and communication system comprising such system
JP2976980B2 (ja) キャッシュ制御方式
JP2001051898A (ja) 階層キャッシュメモリのデータ参照方法、および、階層キャッシュメモリを含むデータ処理装置
JPS61220047A (ja) メモリ制御方式
JP2845746B2 (ja) マイクロプログラム制御装置
JPH02226447A (ja) コンピユータ・システムおよびその記憶装置アクセス方法
JPS5854478A (ja) 主記憶制御方法
JP2000172564A (ja) キャッシュ一致保証制御を行う情報処理装置
JPH04506125A (ja) キャッシュを備えた計算機
JPS5842546B2 (ja) ストア制御方式
JPH02156352A (ja) キャッシュメモリ
JPH02101552A (ja) アドレス変換バッファ処理方式
JPH06195263A (ja) キャッシュ・メモリ・システム
JPS6093562A (ja) 緩衝記憶制御装置
JPH02304649A (ja) キャッシュメモリ高速アクセス方式