JPS5964358A - 金属箔張り積層板の製造方法 - Google Patents

金属箔張り積層板の製造方法

Info

Publication number
JPS5964358A
JPS5964358A JP57174942A JP17494282A JPS5964358A JP S5964358 A JPS5964358 A JP S5964358A JP 57174942 A JP57174942 A JP 57174942A JP 17494282 A JP17494282 A JP 17494282A JP S5964358 A JPS5964358 A JP S5964358A
Authority
JP
Japan
Prior art keywords
manufacture
resin
prepreg
laminate
laminated board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57174942A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0340709B2 (enExample
Inventor
中村　敏光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP57174942A priority Critical patent/JPS5964358A/ja
Publication of JPS5964358A publication Critical patent/JPS5964358A/ja
Publication of JPH0340709B2 publication Critical patent/JPH0340709B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates

Landscapes

  • Laminated Bodies (AREA)
JP57174942A 1982-10-04 1982-10-04 金属箔張り積層板の製造方法 Granted JPS5964358A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57174942A JPS5964358A (ja) 1982-10-04 1982-10-04 金属箔張り積層板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57174942A JPS5964358A (ja) 1982-10-04 1982-10-04 金属箔張り積層板の製造方法

Publications (2)

Publication Number Publication Date
JPS5964358A true JPS5964358A (ja) 1984-04-12
JPH0340709B2 JPH0340709B2 (enExample) 1991-06-19

Family

ID=15987421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57174942A Granted JPS5964358A (ja) 1982-10-04 1982-10-04 金属箔張り積層板の製造方法

Country Status (1)

Country Link
JP (1) JPS5964358A (enExample)

Also Published As

Publication number Publication date
JPH0340709B2 (enExample) 1991-06-19

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