JPS593642A - 制御レジスタ処理方式 - Google Patents

制御レジスタ処理方式

Info

Publication number
JPS593642A
JPS593642A JP57113470A JP11347082A JPS593642A JP S593642 A JPS593642 A JP S593642A JP 57113470 A JP57113470 A JP 57113470A JP 11347082 A JP11347082 A JP 11347082A JP S593642 A JPS593642 A JP S593642A
Authority
JP
Japan
Prior art keywords
control register
instruction
register
memory
firmware
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57113470A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0517577B2 (es
Inventor
Toshio Matsumoto
敏雄 松本
Motokazu Kato
加藤　元計
Kiyosumi Sato
佐藤　清澄
Yoshihiro Mizushima
水島　芳宏
Katsumi Onishi
克己 大西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57113470A priority Critical patent/JPS593642A/ja
Priority to KR1019830002921A priority patent/KR890000100B1/ko
Priority to CA000431511A priority patent/CA1200319A/en
Priority to EP83303789A priority patent/EP0098172B1/en
Priority to AU16409/83A priority patent/AU546572B2/en
Priority to BR8303527A priority patent/BR8303527A/pt
Priority to ES523751A priority patent/ES8405176A1/es
Priority to US06/509,609 priority patent/US4623962A/en
Priority to DE8383303789T priority patent/DE3379848D1/de
Publication of JPS593642A publication Critical patent/JPS593642A/ja
Publication of JPH0517577B2 publication Critical patent/JPH0517577B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30138—Extension of register space, e.g. register cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
JP57113470A 1982-06-30 1982-06-30 制御レジスタ処理方式 Granted JPS593642A (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP57113470A JPS593642A (ja) 1982-06-30 1982-06-30 制御レジスタ処理方式
KR1019830002921A KR890000100B1 (ko) 1982-06-30 1983-06-28 제어 레지스터 처리방식
CA000431511A CA1200319A (en) 1982-06-30 1983-06-29 Register control processing system
EP83303789A EP0098172B1 (en) 1982-06-30 1983-06-30 Register control processing system
AU16409/83A AU546572B2 (en) 1982-06-30 1983-06-30 Register control
BR8303527A BR8303527A (pt) 1982-06-30 1983-06-30 Sistema de processamento de controle de registro
ES523751A ES8405176A1 (es) 1982-06-30 1983-06-30 Sistema de proceso de control de registro.
US06/509,609 US4623962A (en) 1982-06-30 1983-06-30 Register control processing system
DE8383303789T DE3379848D1 (en) 1982-06-30 1983-06-30 Register control processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57113470A JPS593642A (ja) 1982-06-30 1982-06-30 制御レジスタ処理方式

Publications (2)

Publication Number Publication Date
JPS593642A true JPS593642A (ja) 1984-01-10
JPH0517577B2 JPH0517577B2 (es) 1993-03-09

Family

ID=14613061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57113470A Granted JPS593642A (ja) 1982-06-30 1982-06-30 制御レジスタ処理方式

Country Status (9)

Country Link
US (1) US4623962A (es)
EP (1) EP0098172B1 (es)
JP (1) JPS593642A (es)
KR (1) KR890000100B1 (es)
AU (1) AU546572B2 (es)
BR (1) BR8303527A (es)
CA (1) CA1200319A (es)
DE (1) DE3379848D1 (es)
ES (1) ES8405176A1 (es)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021503119A (ja) * 2017-11-14 2021-02-04 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ メモリベースの構成状態レジスタを提供するコンピュータ・プログラム、コンピュータ・システム、およびコンピュータ実装方法
JP2021503121A (ja) * 2017-11-14 2021-02-04 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ 構成状態レジスタの一括格納および読み込み動作を提供するコンピュータ・プログラム、コンピュータ・システム、およびコンピュータ実装方法
US11579806B2 (en) 2017-11-14 2023-02-14 International Business Machines Corporation Portions of configuration state registers in-memory

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5960652A (ja) * 1982-09-30 1984-04-06 Fujitsu Ltd デ−タ処理装置
US5249266A (en) * 1985-10-22 1993-09-28 Texas Instruments Incorporated Data processing apparatus with self-emulation capability
US5140687A (en) * 1985-10-22 1992-08-18 Texas Instruments Incorporated Data processing apparatus with self-emulation capability
US5293631A (en) * 1991-08-06 1994-03-08 Hewlett-Packard Company Analysis and optimization of array variables in compiler for instruction level parallel processor
US5666556A (en) * 1993-12-30 1997-09-09 Intel Corporation Method and apparatus for redirecting register access requests wherein the register set is separate from a central processing unit
US5758117A (en) * 1995-12-14 1998-05-26 International Business Machines Corporation Method and system for efficiently utilizing rename buffers to reduce dispatch unit stalls in a superscalar processor
US6298435B1 (en) * 1996-04-16 2001-10-02 International Business Machines Corporation Methods and apparatus for exploiting virtual buffers to increase instruction parallelism in a pipelined processor
US6003126A (en) * 1997-07-01 1999-12-14 International Business Machines Special instruction register including allocation field utilized for temporary designation of physical registers as general registers
GB2460280A (en) * 2008-05-23 2009-11-25 Advanced Risc Mach Ltd Using a memory-abort register in the emulation of memory access operations
US9229745B2 (en) 2012-09-12 2016-01-05 International Business Machines Corporation Identifying load-hit-store conflicts
CN116226021B (zh) * 2023-05-06 2023-07-25 摩尔线程智能科技(北京)有限责任公司 数据收发方法、装置以及图形处理器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439539A (en) * 1977-09-05 1979-03-27 Hitachi Ltd Data processor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4351024A (en) * 1975-04-21 1982-09-21 Honeywell Information Systems Inc. Switch system base mechanism

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439539A (en) * 1977-09-05 1979-03-27 Hitachi Ltd Data processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021503119A (ja) * 2017-11-14 2021-02-04 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ メモリベースの構成状態レジスタを提供するコンピュータ・プログラム、コンピュータ・システム、およびコンピュータ実装方法
JP2021503121A (ja) * 2017-11-14 2021-02-04 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ 構成状態レジスタの一括格納および読み込み動作を提供するコンピュータ・プログラム、コンピュータ・システム、およびコンピュータ実装方法
US11579806B2 (en) 2017-11-14 2023-02-14 International Business Machines Corporation Portions of configuration state registers in-memory

Also Published As

Publication number Publication date
ES523751A0 (es) 1984-05-16
CA1200319A (en) 1986-02-04
ES8405176A1 (es) 1984-05-16
US4623962A (en) 1986-11-18
AU1640983A (en) 1984-01-05
EP0098172B1 (en) 1989-05-10
KR890000100B1 (ko) 1989-03-07
EP0098172A3 (en) 1985-10-09
EP0098172A2 (en) 1984-01-11
JPH0517577B2 (es) 1993-03-09
DE3379848D1 (en) 1989-06-15
AU546572B2 (en) 1985-09-05
BR8303527A (pt) 1984-02-07

Similar Documents

Publication Publication Date Title
JP4982347B2 (ja) 画像情報の更新を検出するプログラム、方法および画像処理装置
JPS593642A (ja) 制御レジスタ処理方式
JPS6029126B2 (ja) デ−タ処理装置
JP2000353092A (ja) 情報処理装置及びそのレジスタファイル切替方法
JP2553200B2 (ja) 情報処理装置
JP3507193B2 (ja) ロード・ストア命令処理装置
JP2915680B2 (ja) Ｒｉｓｃプロセッサ
JP2731618B2 (ja) エミュレータ
JPH0535499A (ja) データ処理装置及びデータ処理方法
JPS6252334B2 (es)
JP3715505B2 (ja) 特定用途向け演算命令を有する計算機およびその計算機の計算方法
JPH02272654A (ja) キャッシュメモリ装置
JPH0795288B2 (ja) マイクロコンピュータ
JPH02211561A (ja) プロセッサ及びストアバッファ制御方法
JPS60193046A (ja) 命令例外検出方式
JPS59106048A (ja) マイクロプロセツサシステム
JPH05334074A (ja) マイクロプロセッサ
JPS60193047A (ja) マイクロプログラムのロ−ドチエツク方式
JPH03168845A (ja) 命令実行制御方式
JPH0427575B2 (es)
JPH0282318A (ja) 浮動小数点演算装置
JPH03113659A (ja) キャッシュメモリ試験方法
JP2004118235A (ja) データ処理装置
JPS58123146A (ja) メモリアドレス拡張方式
JPH02272628A (ja) キャッシュメモリ装置