JPS5925258A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JPS5925258A
JPS5925258A JP13415882A JP13415882A JPS5925258A JP S5925258 A JPS5925258 A JP S5925258A JP 13415882 A JP13415882 A JP 13415882A JP 13415882 A JP13415882 A JP 13415882A JP S5925258 A JPS5925258 A JP S5925258A
Authority
JP
Japan
Prior art keywords
circuit
signal
output
input
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13415882A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0576184B2 (enrdf_load_stackoverflow
Inventor
Toshitaka Fukushima
福島 敏高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13415882A priority Critical patent/JPS5925258A/ja
Publication of JPS5925258A publication Critical patent/JPS5925258A/ja
Publication of JPH0576184B2 publication Critical patent/JPH0576184B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17796Structural details for adapting physical parameters for physical disposition of blocks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54433Marks applied to semiconductor devices or parts containing identification or tracking information
    • H01L2223/5444Marks applied to semiconductor devices or parts containing identification or tracking information for electrical read out

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP13415882A 1982-07-30 1982-07-30 半導体集積回路装置 Granted JPS5925258A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13415882A JPS5925258A (ja) 1982-07-30 1982-07-30 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13415882A JPS5925258A (ja) 1982-07-30 1982-07-30 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS5925258A true JPS5925258A (ja) 1984-02-09
JPH0576184B2 JPH0576184B2 (enrdf_load_stackoverflow) 1993-10-22

Family

ID=15121813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13415882A Granted JPS5925258A (ja) 1982-07-30 1982-07-30 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS5925258A (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6095930A (ja) * 1983-10-31 1985-05-29 Toshiba Corp 集積回路試験システム及び集積回路装置
JPS6183977A (ja) * 1984-09-29 1986-04-28 Nec Corp 半導体装置の検査装置
JPS61287315A (ja) * 1985-06-13 1986-12-17 Mitsubishi Electric Corp 半導体集積回路
JPS63148613A (ja) * 1986-12-12 1988-06-21 Nec Corp 半導体集積回路の製造方法
US4798415A (en) * 1987-01-26 1989-01-17 Toyota Jidosha Kabushiki Kaisha Device for adjusting elevational position of head rest
JPH02281657A (ja) * 1989-04-21 1990-11-19 Nec Corp 半導体集積回路

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6095930A (ja) * 1983-10-31 1985-05-29 Toshiba Corp 集積回路試験システム及び集積回路装置
JPS6183977A (ja) * 1984-09-29 1986-04-28 Nec Corp 半導体装置の検査装置
JPS61287315A (ja) * 1985-06-13 1986-12-17 Mitsubishi Electric Corp 半導体集積回路
JPS63148613A (ja) * 1986-12-12 1988-06-21 Nec Corp 半導体集積回路の製造方法
US4798415A (en) * 1987-01-26 1989-01-17 Toyota Jidosha Kabushiki Kaisha Device for adjusting elevational position of head rest
JPH02281657A (ja) * 1989-04-21 1990-11-19 Nec Corp 半導体集積回路

Also Published As

Publication number Publication date
JPH0576184B2 (enrdf_load_stackoverflow) 1993-10-22

Similar Documents

Publication Publication Date Title
CN1025261C (zh) 具有识别电路的半导体集成电路芯片
US6047344A (en) Semiconductor memory device with multiplied internal clock
JP2950475B2 (ja) メモリを備えた組込み自己検査
KR100200916B1 (ko) 웨이퍼 테스트 신호 발생기를 가지는 반도체 메모리 장치
JPS5925258A (ja) 半導体集積回路装置
US4180772A (en) Large-scale integrated circuit with integral bi-directional test circuit
US5347145A (en) Pad arrangement for a semiconductor device
US6653727B2 (en) Semiconductor chip package with direction-flexible mountability
US6222211B1 (en) Memory package method and apparatus
US11935605B2 (en) Method for preparing semiconductor device including an electronic fuse control circuit
JPS6379337A (ja) 半導体基板
JP2006196159A (ja) 個別チップのデバイス情報を直接読み取り可能なシグネチャー識別装置を有するマルチチップパッケージ
JPH0541429A (ja) 半導体icウエーハおよび半導体icの製造方法
JPS6158966B2 (enrdf_load_stackoverflow)
JPH06209078A (ja) 素子の特性評価用回路
JPS6333301B2 (enrdf_load_stackoverflow)
KR20020045641A (ko) 반도체 디바이스
JP2545815B2 (ja) 半導体集積回路の良品・不良品判別方法
JPH01100943A (ja) マスタースライス方式の半導体集積回路装置
US6492706B1 (en) Programmable pin flag
KR100426989B1 (ko) 패키지 전원핀을 이용한 제어신호 인가방법 및 그에 따른집적회로 패키지 구조
JPS6016450A (ja) 半導体集積回路装置
WO2022165293A1 (en) Multi-function bond pad
JPS61274341A (ja) 半導体論理装置
JPH1187198A (ja) 製造情報を記憶する記憶部を有する半導体集積回路、半導体集積回路に製造状態を記録する方法、および、製造情報を記録した半導体集積回路を管理する方法