JPS59175797A - Method of producing multilayer printed plate - Google Patents

Method of producing multilayer printed plate

Info

Publication number
JPS59175797A
JPS59175797A JP5071083A JP5071083A JPS59175797A JP S59175797 A JPS59175797 A JP S59175797A JP 5071083 A JP5071083 A JP 5071083A JP 5071083 A JP5071083 A JP 5071083A JP S59175797 A JPS59175797 A JP S59175797A
Authority
JP
Japan
Prior art keywords
board
inner layer
multilayer printed
forming
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5071083A
Other languages
Japanese (ja)
Inventor
光男 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5071083A priority Critical patent/JPS59175797A/en
Publication of JPS59175797A publication Critical patent/JPS59175797A/en
Pending legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (a)発明の技術分野 本発明は多層プリント板の製造方法の改良に関する。[Detailed description of the invention] (a) Technical field of the invention The present invention relates to an improvement in the method for manufacturing multilayer printed boards.

(b)  技術の背景 喝算機等を形成する電子回路には゛世気回路を形成した
プリント板を多数積層して配設したj、l、72δがす
でに周知である。
(b) Background of the Technology J, L, and 72δ, which have a large number of laminated printed boards on which circuits are formed, are already well known as electronic circuits forming calculators and the like.

(C)  従来技術と間関点 このような多層プリント板の従来の製造方法について述
べるとまず両面に銅張りを施したノ、L板の表面にレジ
スト膜を塗布する。その後該しジストIII上に所定の
パターンを形1fJシたフィルムを貼りつけ露光する。
(C) Interference with the prior art Regarding the conventional manufacturing method of such a multilayer printed board, first, a resist film is applied to the surface of the L board, which is coated with copper on both sides. Thereafter, a film with a predetermined pattern in the form of 1fJ is pasted onto the resist III and exposed.

次いで露光した部分のレジストeを現像除去して所定パ
ターンのレジスト膜を形+i!2 俊、該レジスト膜を
マ1、スフとして不要都の銅り長り基板の銅はくをエツ
チングする。次いで該レジスi11×を除去して鋼張り
基板上に内層回路パターンを得る。
Next, the exposed portion of the resist e is developed and removed to form a resist film with a predetermined pattern. 2. Next, use the resist film as a masking mask to etch the copper foil on the substrate with unnecessary copper edges. Next, the resist i11x is removed to obtain an inner layer circuit pattern on the steel-clad substrate.

次にこのように内層IL!1路を形成した鏑張り基板を
1枚あるいはり数枚ガイドビン分用い接/rζシート(
プリプレグ)と重ね合わせて積層する。その接顔基板を
熱圧着して前記基板を槓ic4形成し一体化する。
Next, like this inner layer IL! One or several guide bins are used to connect a board with one path formed on it/rζ sheet (
Prepreg). The face-contact substrate is bonded by thermocompression to form an integrated circuit board (IC4).

次いで内層回路間を接続するためのスルホールをドリル
刀11工で形成する。
Next, through holes for connecting the inner layer circuits are formed using a drill bit.

次いで該基板およびスルホールの部分をすべて銅のfr
rc rM $pイメメッをノ裔して銅を析出ζせたの
ち、史に銅の78 PJfメッキをJaす○その後積層
した鋼張り基板の表面にH1J述した内層回路形成と同
様な方法でバターニングせるレジスト膜を用いて、所定
の基板表面にj′に出する回路をプレ成する。然し旧述
した従来の多層プリント板の製造方法においては、スル
ボール形成の際のドリルJJ+I工11(fにお・いて
プリント板の俗解した切用1、すなわちスミャーと称す
る鼓膜がスルホール内にこびりつき、そのためその伎の
工程でスルホール内および基板に無′亀珀綱メッキ全施
そうとしても、メッキ層がスルポール内の内MJ回回路
上くとブd分接続されず、したがってスルホールを介し
て基板にプレ成された内層回路が信頼性の低い状態で接
続されるという不都合を生じていた。
Then, the substrate and the through holes were all coated with copper fr.
rc rM $pAfter depositing copper using the image, 78 PJf plating of copper was applied.After that, butter was applied to the surface of the laminated steel board using the same method as the inner layer circuit formation described in H1J. A circuit to be exposed at j' is pre-formed on a predetermined substrate surface using a resist film that can be etched. However, in the conventional multilayer printed board manufacturing method described above, when forming the through holes, the drill JJ+I process 11 (f) causes the tympanic membrane called smear to get stuck in the through holes. Therefore, even if you try to completely plate the inside of the through hole and the board in the process, the plating layer will not be connected to the inside MJ circuit in the through hole, and therefore it will not be connected to the board through the through hole. This has resulted in the inconvenience that prefabricated inner layer circuits are connected with low reliability.

そこでnす記スミャーの発生を防ぐためにドリル加工時
のドリルの嵌状、ドリルの1・11転数、ドリルの送り
速度を桃々変史式せてドリル加工を?fつだが、n11
記固型吻の発生を防ぐには部分てなかった。
Therefore, in order to prevent the occurrence of n-mark smear, the fit shape of the drill, the 1/11 rotation number of the drill, and the feed rate of the drill should be changed to a modified formula during drilling. f two but n11
There was no way to prevent the occurrence of solid proboscis.

又スミャーを除去するため硫酸あるいは弗醒等の化学桑
品を由いて前記1[11型吻を溶)11¥、処理するこ
とも試みたかそれら桑品の温度、縮度、処理時間の煩雑
さのため、このような方法では充分OrJ記固記動型物
去できないといった四〜51点を生し−Cいる0 (d)  発明の目的 本発明は上述した間:′!1点を除去し、目「J記スル
ホール内の固型物全充分透失し、もってスルホール内の
内層lL!回路銅けく低面に無電解銅メッキ層が(+i
6実に形感てきるので、上記銅メッキされたスルホール
を介して同ハ・)回路同志が信頼度良く接続でき得るよ
うな、新規な多層プリント板の・4遣方法の提供を目的
とするものである。
In addition, in order to remove smear, it has been attempted to treat the smear using chemical mulberry products such as sulfuric acid or fluorocarbons. Therefore, there are 4 to 51 points that such methods cannot sufficiently remove OrJ memorized animal molds. 1 point is removed, and all the solid matter in the through-hole in J is completely evaporated, and the inner layer in the through-hole is removed. Electroless copper plating layer is formed on the lower surface of the circuit copper layer (+i
6) The purpose of this is to provide a novel multilayer printed circuit board method in which circuits can be connected with high reliability through the copper-plated through-holes. It is.

(e)  発明の構成 かかる目的を達成するための本発明の多層プリント板の
製造方法は、銅張り基板の表rhIにレジスト膜を塗布
後、該レジスト膜を所定パターンに形成し、該パターニ
ングせるレジスト膜をマスクとして銅張り基板の表面を
所定パターンに形成して内層回路全形成後、該内層回路
を形成した基板を接着シートと積Icjシ、次いでスル
ホールを前記基板に形成後前記基板をメッキして該基板
表面に回路を形成してなる多層プリント板の製造方法に
おいて、前記内層回路を形成した基板にスルホールを形
成後、MU記スルホール形成時に生じた樹脂の鼓膜およ
び内層銅箔を溶解するエツチング液に浸漬してから、1
1:J記基板を高圧の洗浄水を用いて洗浄することを憫
徴とするものである。
(e) Structure of the Invention In order to achieve the above object, the method for manufacturing a multilayer printed board of the present invention includes applying a resist film to the surface rhI of a copper-clad board, forming the resist film in a predetermined pattern, and performing the patterning. After forming the surface of the copper-clad board into a predetermined pattern using a resist film as a mask and forming all the inner layer circuits, the board on which the inner layer circuits have been formed is laminated with an adhesive sheet, and then through holes are formed on the board and the board is plated. In the method for manufacturing a multilayer printed board in which a circuit is formed on the surface of the board by forming a circuit on the surface of the board, after forming a through hole in the board on which the inner layer circuit has been formed, melting the resin eardrum and inner layer copper foil produced during the formation of the MU through hole. After soaking in the etching solution,
1: This is a warning to clean the J substrate using high-pressure cleaning water.

(f)  発明の実施例 以下回向を用いて本発明の一実施例につき訃細に説明す
る。第1図および第2図は不発明の多層プリント板の1
例を示す断面図である。
(f) Embodiment of the Invention An embodiment of the invention will be described in detail below. Figures 1 and 2 are one example of an uninvented multilayer printed board.
It is a sectional view showing an example.

図示するように画面に所定のパターンの内層回路を形成
した銅張基板lを挾みこむようにしてシート状の熱硬化
性の樹脂2を設置する。そして該樹脂2上に1iII1
1張&3をガイドビン(図示せず)を用いて積層したの
ち熱圧着する。
As shown in the figure, a sheet-like thermosetting resin 2 is placed so as to sandwich a copper-clad substrate 1 having a predetermined pattern of inner layer circuits formed on the screen. Then, on the resin 2, 1iIII1
1 and 3 were laminated using a guide bin (not shown) and then thermocompression bonded.

次いで内層回路間を接続するためのスルホール4をドリ
ル加工で形成する。
Next, through holes 4 for connecting the inner layer circuits are formed by drilling.

その&gドリル別工を施した多層プリント板を過硫酸ア
ンモニウムC(NH4)28208)の水溶液中に浸漬
し、内層回路を形成している銅箔が露出面より3〜lO
μ〃144度エツチングされるようにする。その結果ド
リルJJII工によって発生した樹脂の溶@物よりなる
スミャーと称する固型v/Jは内層銅箔がエツチングさ
れてその結果、それらの間に間隙か生じ孤立する。
The multilayer printed board that had been specially drilled was immersed in an aqueous solution of ammonium persulfate C (NH4) 28208), and the copper foil forming the inner layer circuit was exposed from the exposed surface by 3 to 10
μ〃Ensure that it is etched at 144 degrees. As a result, the inner copper foil of the solid V/J, called smear, made of the melted resin produced by the JJII drill is etched, and as a result, a gap is created between them and isolated.

その少前記多Wjプリント板を水M7.洸浄した佐アル
ミナ(AAzO3)を混合した圧力2−5 kQ / 
crlの高圧水を用いてホーニングにより13’l i
+12基敬をbし津する。その伎圧力を更に3〜10k
g/ (・粥と加圧した高圧水により基懐を洗浄する。
Water M7. The pressure of mixed purified salumina (AAzO3) is 2-5 kQ/
13'l i by honing using crl high pressure water
+12 Motoyuki b. Increase the pressure by another 3~10k.
g/ (・Wash the base with gruel and pressurized water.

1勾 このようにすると瘉層輌箔が過硫躯アンモニウムでエツ
チングされてスミャーとの間に間隙を牛して、向滑して
いるスミャーと称する固型物は17:;懺に除去され、
第2図に示すように凹1)i 5がノビ成される。
1. By doing this, the smear layer is etched with ammonium persulfate to create a gap between it and the smear.
As shown in FIG. 2, a recess 1) i5 is formed.

このようにすれは前駆したスミャーと称するli!ii
型物が完全に除去−Cきるので、その後の工程で該積層
基板に無心d銅メンギを施した場合、スルホール4の内
面にか1こ訟れた銅メッキは完全に内層銅箔j7+T+
jをV、復できることになり内層回路間の接計には伯す
剪曽ミの、冒、いものとなる。
In this way, the li called the progenitor Sumya! ii
Since the molding can be completely removed, when the multilayer board is coated with solid copper in the subsequent process, the copper plating on the inner surface of the through hole 4 will be completely replaced by the inner layer copper foil J7+T+
Since j can be reduced to V, it becomes a blasphemy to reduce the contact between the inner layer circuits.

(g)  発明の効果 以上述べたように7ノ′−うcl!IJの方法により多
層プリント抜を膨成すれは、l”i Ifj回FiI用
同志に接続不良を生じないMJ信頼反の多j・々プリン
) 5rえか形成され、また熱衝撃等に対してf・1抗
性のある高イぎ頼1及の多層プリン) 4)X ’lj
” 4;、;られる利点を生しる。
(g) Effects of the invention As stated above, 7 no'-Ucl! Expanding the multi-layer printed material by the IJ method is a reliable MJ method that does not cause connection failures between the IJ and FII members. Multi-layered pudding with high f・1 resistance) 4) X'lj
” 4;

4、 図1/]lのr揚油な説明 第1図、才jよひ弔2図は本うe明の多j曽プリント敬
のハI!清方法の工4+!をろくす1ift面図であθ
4, Figure 1/] l's deep-frying explanation Figure 1, Saijyohi's funeral Figure 2 are the original prints of Ming's Tajiso prints! Qing Method Technique 4+! θ is the 1ift plan view
.

図において11はシj)J張漬号板、2は樹月旨、3は
プリント板、4はスルボール、Iは口頭を示す。
In the figure, 11 indicates the name board, 2 indicates the name of the tree, 3 indicates the printed board, 4 indicates the board, and I indicates the word of mouth.

第1図 第2図Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 銅張り基板の表面にレジスト膜を塗布後、該レジスト膜
を所定パターンに形成し、該バターニングせるレジス1
4をマスクとして金属張り基板の両面を所定パターンに
形成して内層回路を形成後、該内層回路を形成した基板
を積層し、吹いてスルホールをitJ記基板基板成仮、
1[1記基板をメッキして、該基板衣11ijに回路を
形成してなる多層プリント板の製造方法において、前記
内層回路をル或した基板にスルホールをガ11工後、n
IJ記スルホール加工時に生じた樹脂の飲膜および、内
層金属箔を溶解するエンチンダ液に浸漬してから、前記
基板を洗浄水を用いて洗浄除去することを特徴とする多
層プリント板の製造方法。
After applying a resist film to the surface of the copper-clad substrate, the resist film is formed into a predetermined pattern, and the resist 1 is patterned.
After forming an inner layer circuit by forming a predetermined pattern on both sides of the metal-clad substrate using 4 as a mask, the substrates with the inner layer circuit formed thereon are laminated, and through holes are formed by blowing.
1 [In the method for manufacturing a multilayer printed board by plating the board described in 1 and forming a circuit on the board cover 11ij, after forming through holes in the board on which the inner layer circuit has been formed, n
A method for manufacturing a multilayer printed board, which comprises immersing the substrate in an entinda solution that dissolves the resin membrane produced during through-hole processing and the inner layer metal foil, and then washing and removing the substrate using washing water.
JP5071083A 1983-03-25 1983-03-25 Method of producing multilayer printed plate Pending JPS59175797A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5071083A JPS59175797A (en) 1983-03-25 1983-03-25 Method of producing multilayer printed plate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5071083A JPS59175797A (en) 1983-03-25 1983-03-25 Method of producing multilayer printed plate

Publications (1)

Publication Number Publication Date
JPS59175797A true JPS59175797A (en) 1984-10-04

Family

ID=12866449

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5071083A Pending JPS59175797A (en) 1983-03-25 1983-03-25 Method of producing multilayer printed plate

Country Status (1)

Country Link
JP (1) JPS59175797A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6324697A (en) * 1986-07-17 1988-02-02 日立エーアイシー株式会社 Manufacture of wiring board
JPH01256194A (en) * 1988-04-05 1989-10-12 Fujitsu Ltd Resin smear removal

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54157266A (en) * 1978-06-01 1979-12-12 Fujitsu Ltd Chemical cleaning method of multiilayer printed board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54157266A (en) * 1978-06-01 1979-12-12 Fujitsu Ltd Chemical cleaning method of multiilayer printed board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6324697A (en) * 1986-07-17 1988-02-02 日立エーアイシー株式会社 Manufacture of wiring board
JPH01256194A (en) * 1988-04-05 1989-10-12 Fujitsu Ltd Resin smear removal

Similar Documents

Publication Publication Date Title
US5733468A (en) Pattern plating method for fabricating printed circuit boards
JPH1187931A (en) Manufacture of printed circuit board
JPS59175797A (en) Method of producing multilayer printed plate
JPH01290289A (en) Method of forming conductor pattern
JPH036880A (en) Printed wiring board and manufacture thereof
JPH1187886A (en) Production of printed wiring board
JPS6182497A (en) Manufacture of printed circuit board
JP3077255B2 (en) Wiring board and its manufacturing method
JPH08186357A (en) Printed wiring board and manufacture thereof
JPH03201592A (en) Manufacture of printed circuit board
JPH0219990B2 (en)
JPS59155994A (en) Method of producing printed circuit board
JP2647007B2 (en) Manufacturing method of printed wiring board
JP3056865B2 (en) Manufacturing method of printed wiring board
JPH05308194A (en) Manufacture of multilayer printed wiring board
JPH02105596A (en) Manufacture of printed wiring board
JPS62128596A (en) Manufacture of rigid multilayer printed circuit substrate
JPS62156898A (en) Manufacture of through-hole printed wiring board
JPH05327184A (en) Manufacture of board on which electronic components are mounted
JPH118465A (en) Manufacture of printed wiring board through additive method
JPS61152094A (en) Manufacture of printed circuit board by mechanical masking
JPH0613753A (en) Manufacture of aluminium substrate for semiconductor use
JPS613494A (en) Method of producing printed board
JPH02174194A (en) Manufacture of circuit board
JPS58112392A (en) Method of producing printed circuit board