JPS62128596A - Manufacture of rigid multilayer printed circuit substrate - Google Patents

Manufacture of rigid multilayer printed circuit substrate

Info

Publication number
JPS62128596A
JPS62128596A JP26839585A JP26839585A JPS62128596A JP S62128596 A JPS62128596 A JP S62128596A JP 26839585 A JP26839585 A JP 26839585A JP 26839585 A JP26839585 A JP 26839585A JP S62128596 A JPS62128596 A JP S62128596A
Authority
JP
Japan
Prior art keywords
layer
printed circuit
circuit
forming
flexible conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26839585A
Other languages
Japanese (ja)
Other versions
JPH0353796B2 (en
Inventor
志賀 章二
須田 英男
吉章 荻原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP26839585A priority Critical patent/JPS62128596A/en
Publication of JPS62128596A publication Critical patent/JPS62128596A/en
Publication of JPH0353796B2 publication Critical patent/JPH0353796B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、電子部品を搭載するプリント回路基板に係り
、特に経済性に優れろと共に高密度面実装を可能にした
リジッド型多層プリント回路基板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a printed circuit board on which electronic components are mounted, and in particular to a rigid multilayer printed circuit board that is highly economical and enables high-density surface mounting. Relating to a manufacturing method.

(従来の技術) 従来、プリント回路基板として紙フェノールやガラスエ
ポキシ板上にCu箔を強固に貼着し、これにエツチング
処理を施して所定の回路を形成したものや、或いはこれ
らを多層に積層して高密度化したものが使用されている
。乙のようなプリント回路基板は、量産できるので比較
的経済性に侵れている面を有しているが、他面で(よ樹
脂を基板材料とするため伝熱性、放熱性に乏しいという
欠点も持っている。このため、高密度な両面実装によっ
て部品を搭載したプ゛ノン)・回路基板では、熱管理上
の許容限界に達している場合が多く、なかでも比較的大
きい電力や使用する電、原回路やパワーエレクトロニク
ス回路においては早急に解決を要する問題となっている
。即ち、電子部品が高密度に小型化されろと同時に面実
装型へ移行する場合、基板の放熱性に関する問題は普遍
的重要性を有していると言えるっ (発明が解決しようとする問題点) 上記問題の対応策として、伝熱性の大きいアルミナ等の
セラミックを基板に採用したプリント回路基板が使用さ
れている。しかし、このようなセラミンク回路基板には
、上述の樹脂を用いたプリント回路基板に比へて2〜3
倍の高い製造コストになり、しかも特殊な製造工程を必
要とする問題がある。またセラミック回路基板の場合、
加熱焼成時に寸法変化が起きると共にその際の変形を回
避ずろことがてきないため、基板の形状についての制約
か大与い。
(Prior art) Conventionally, printed circuit boards have been made by firmly adhering Cu foil to a paper phenol or glass epoxy board and etching it to form a predetermined circuit, or by laminating these in multiple layers. A high-density product is used. Printed circuit boards like the one mentioned above have the advantage of being relatively economical because they can be mass-produced; For this reason, circuit boards mounted with components using high-density double-sided mounting often reach the permissible limits in terms of thermal management. This is a problem that requires an urgent solution in electrical circuits, original circuits, and power electronics circuits. In other words, as electronic components become more compact and denser, and at the same time shift to surface-mounted types, it can be said that the problem of heat dissipation of the board is of universal importance (the problem that the invention aims to solve). ) As a countermeasure to the above-mentioned problem, a printed circuit board whose substrate is made of ceramic such as alumina, which has high heat conductivity, is used. However, such ceramic circuit boards have a 2 to 3
There are problems in that the manufacturing cost is doubled and a special manufacturing process is required. Also, in the case of ceramic circuit boards,
Dimensional changes occur during heating and firing, and there is no way to avoid deformation at that time, so there are significant restrictions on the shape of the substrate.

そこで、アルミニウム欧にCu 箔’= M(J L 
、これにエツチング処理や施してプリン)・回路基板と
しt二ものが開発されている。しかしこの種のブ□ノン
ト回路基板の場合、片面プリントであるため、高Tf度
実装を十分には達成てきないとし)う問題が残されろ。
Therefore, Cu foil' = M (J L
Two types of circuit boards have been developed, including etching and printing. However, in the case of this type of printed circuit board, since it is printed on one side, there remains the problem that high Tf degree mounting cannot be fully achieved.

本発明は、かかる点に鑑みて為されたものであり、伝熱
特性を向上させろと共に高密度面′A装を可能にし、か
つ量産を可能にして製造コストの低減を達成したリジッ
ド型多層プリント回路基板の製造方法を提供するもので
ある。
The present invention has been made in view of these points, and is a rigid multilayer print that improves heat transfer characteristics, enables high-density A-mounting, and enables mass production to reduce manufacturing costs. A method for manufacturing a circuit board is provided.

(問題点を解決するための手段) 本発明方法を2府回路基板を例にとり、図面に基づいて
説明する。
(Means for Solving the Problems) The method of the present invention will be explained based on the drawings, taking a two-way circuit board as an example.

第1図(aiば出発素材のフレキンプル導体を示してお
り、1はポリイミド、ポリアミド、ポリエーテル等の#
4熱性プラスチックの箔体て、厚さは25〜100μm
程度である。2a及び2bはCu箔等の金属導体箔で、
一般には35μm、18μm、12μm等の厚さのもの
が用いられる。前記プラスチック1及び金属導体箔2は
接着剤を介するか、又は直接熱圧着で接合されろ。ここ
でフレキシブルとは、4u’プラスチック済体の使用に
起因する素材の柔軟さを意味し、この薄いプラスチック
箔体使用が後述する通り回路基板の放熱性に対する不可
欠の条件となっている。
Figure 1 (ai shows the flexible conductor of the starting material, 1 is made of polyimide, polyamide, polyether, etc.)
4 Heat-resistant plastic foil, thickness 25-100μm
That's about it. 2a and 2b are metal conductor foils such as Cu foil,
Generally, those having a thickness of 35 μm, 18 μm, 12 μm, etc. are used. The plastic 1 and the metal conductor foil 2 may be joined using an adhesive or directly by thermocompression bonding. Here, "flexible" means the flexibility of the material resulting from the use of a 4u' plastic body, and the use of this thin plastic foil body is an essential condition for the heat dissipation of the circuit board, as will be described later.

第1[9fblはドリリングやパンチングにより、スル
ーホール3を形成した状態を示している。次に第1図f
clのごとく、常法によりPd触媒でプラスチック1表
面を活性化してから、Cu化学メッキにより導電化し、
引き続き電気メッキにより所望厚さのCuメッキ層4を
形成する。
The first [9fbl] shows a state in which a through hole 3 is formed by drilling or punching. Next, Figure 1 f
As in cl, the surface of the plastic 1 is activated with a Pd catalyst using a conventional method, and then made conductive by Cu chemical plating.
Subsequently, a Cu plating layer 4 of a desired thickness is formed by electroplating.

次に、常法によりエラチンブレジスI−あるいは感光性
ドライフィルムを用いてマスク層を形成し、続いてエツ
チングを施し片面に第1層回路5a、5b。
Next, a mask layer is formed using Eratin Breath I- or a photosensitive dry film by a conventional method, and then etching is performed to form the first layer circuits 5a and 5b on one side.

5Cをパターニングする。第1図(dlはマスク行剥離
後の状態を示す。
Pattern 5C. FIG. 1 (dl shows the state after mask row peeling).

次に、上記工程を経たフレキシブル導体は、接着剤とし
ての作用も兼ねる絶IW86を介して、金属基板7に接
合されろ。該金属基板7にはCu板、AI板あるいはF
e板等が用いられ、予め絶縁処理を施されたものを用い
てもよい。第1図te+はこの様子を示す。
Next, the flexible conductor that has gone through the above steps is bonded to the metal substrate 7 via the insulated IW 86 which also functions as an adhesive. The metal substrate 7 includes a Cu plate, an AI plate, or an F plate.
An e-board or the like may be used, and one that has been previously subjected to insulation treatment may also be used. FIG. 1 te+ shows this situation.

しかる後、第1図if)のごとく第2fV1回路8a、
8bが、IYII記第1層回路のときと同様に形成され
る。
After that, as shown in FIG. 1 if), the second fV1 circuit 8a,
8b is formed in the same manner as in the first layer circuit of IYII.

この第2層回98a、8bには半田レジストやフラック
ス、又(よ必要に応じてAu、 Ag、 Sn、 Sn
 −pb等のメッキ等が施されて仕上げられる。
The second layer layers 98a and 8b are coated with solder resist, flux, and (as necessary, Au, Ag, Sn, and Sn).
- Finished with plating such as PB.

以上の操作は、基本的には通常のプリント回路基板の場
合と同様である。また、Cuメッキ層4を形成する際に
上記のごとくパネルメッキ法を採用したが、パターンメ
ッキ法あるいはパーシャリ−アディティブ法等によって
も効率的に回路形成することができることは言うまでも
ない。
The above operations are basically the same as those for ordinary printed circuit boards. Moreover, although the panel plating method was employed as described above to form the Cu plating layer 4, it goes without saying that the circuit can also be efficiently formed by a pattern plating method, a partially additive method, or the like.

更に、3層以上の多層回路では、最外層面を除いて両面
に回路形成されたフレキシブル導体を積層し、スルーホ
ールを形成してから金属基板に接合し、しかる後(こ最
外層回路を形成する方法が採られる。
Furthermore, in multilayer circuits with three or more layers, flexible conductors with circuits formed on both sides except for the outermost layer are laminated, through holes are formed, and then bonded to a metal substrate. A method is adopted to do so.

(作 用) 木発明者(ま、フレキンプル導体を用いたりレッド型多
層プリント回路基板について、既に特願昭60−217
3号にて提案しているが、末完FIJJ+、tその製造
方法の改良に関するものである。。
(Function) Wood inventor (well, he has already filed a patent application in 1986-217 for red type multilayer printed circuit boards using flexible conductors).
This is proposed in No. 3, and is related to improvements in the manufacturing method for FIJJ+. .

2.5回路基板について説明すると、第2花回路8a、
8bとして加工される金属導体箔2bが未加工のまま、
金属基板7との張合わせ工程に入るため、前記金型導体
箔2bが補強祠として作用してプレス等の圧力に耐えて
、スルーホール3や細い第1層回路5a、 5b、 5
c iこ悪影響を生ずることなく張合わせ工程を完了す
ることができる。即ち、張合わせ工程時の圧力及び熱に
よってプラスチック1は伸び易く、特にスルーホール3
のエツジ部分等でクラックを発生し易いのであるが、こ
れらに対し前記金属導体箔2bは補強材として有効に・
劾く。
2.5 To explain the circuit board, the second flower circuit 8a,
The metal conductor foil 2b to be processed as 8b remains unprocessed,
In order to enter the bonding process with the metal substrate 7, the mold conductor foil 2b acts as a reinforcement and withstands the pressure of pressing etc., and the through holes 3 and the thin first layer circuits 5a, 5b, 5.
The lamination process can be completed without any adverse effects. That is, the plastic 1 tends to stretch due to the pressure and heat during the bonding process, especially the through hole 3.
The metal conductor foil 2b is effective as a reinforcing material to prevent cracks from forming at the edges.
I'm angry.

ここでプラスチック1の厚さは放熱性の見地から可及的
に薄くシであるため、前記金属導体i2bの厚さでも充
分にその呻び変形を抑止することができる。
Here, since the thickness of the plastic 1 is as thin as possible from the standpoint of heat dissipation, the thickness of the metal conductor i2b can also sufficiently suppress the deformation.

また本発明方法によって得られたブリシ)−回路基板は
、金属基板の少なくとも片面に部品をiI′i実装ずろ
ことができろため、1:′S密度な電子回路においても
大きな伝ネA性、放熱性を有し、ri!J路の(:″、
頼性を大[!」に向上ずろことがてさろ。
Furthermore, since the circuit board obtained by the method of the present invention allows components to be mounted on at least one side of the metal substrate, it has high conductivity A even in 1:'S density electronic circuits. Has heat dissipation properties, ri! J road (:″,
Great reliability [! ``Improved to Zurokoto Tesaro.''

(実IJI例) 以下、本発明の一実協例について説明ずろ。(Actual IJI example) Below, an example of the present invention will be explained.

ボIJ 、< Eドの25μm厚箔体0両面に、厚さ3
5μmの電解Cu泪を貼着しフレキノプル導体を得た。
25 μm thick foil with a thickness of 3 on both sides
A flexinople conductor was obtained by pasting a 5 μm electrolytic Cu layer.

氷晶にはパンチングて孔径0.5〜2 mmφの各種の
スルーホールが穿設された9次に、氷晶を税、指、酸洗
してから、1%Pd(12のHC1’水溶液に浸漬し、
続いてエンブレー1−cu 40 G  (:、Xヤパ
ンメタルフイニッンング社製)のcu化’tメシモ浴に
60℃×20分浸請して厚さ0.5μm程度のメッキを
施してから、更にCu 5o4120 g、/ e 、
 H2So430g/l、  I・yプルチナ(!!!
野製薬社fM)5ppmのCu5O,i谷(30℃、 
 5 A/dm’)て厚さ] 8 μmのCuを全面に
電気メッキした。
Various through holes with hole diameters of 0.5 to 2 mmφ were punched into the ice crystals.Next, the ice crystals were washed, washed with water, and then soaked in a 1% Pd (12% HC1' aqueous solution). Soak,
Next, the plate was plated to a thickness of about 0.5 μm by immersing it in a CU't Mesimo bath of ENBREY 1-CU 40 G (manufactured by XYAPAN METAL FINISHING Co., Ltd.) at 60°C for 20 minutes. , further Cu 5o4120 g,/e,
H2So430g/l, I・y Plutina (!!!
No Pharmaceutical Co., Ltd. fM) 5ppm Cu5O, i valley (30℃,
The entire surface was electroplated with Cu having a thickness of 8 μm (5 A/dm').

次に、氷晶の片面に感光性ドライフィルム(DFR。Next, one side of the ice crystal was coated with a photosensitive dry film (DFR).

旭化成社@)を圧着して露光、現像の後、FeCl3液
で工・ソチングして第1層回路を形成した。その後桟さ
れた前記ドライフィルムを剥離後、氷晶をアルマイト処
理されたAI板(450mmX450mnIX]、2m
mtlにBNを15%含むエポキシ系接着剤令用いてプ
レス圧着した(160℃、 15 kg/c+d。
Asahi Kasei Co., Ltd.) was pressure-bonded, exposed and developed, and then etched and soothed with FeCl3 solution to form a first layer circuit. After peeling off the dry film, the ice crystals were removed from an alumite-treated AI plate (450mm x 450mnIX), 2m long.
Press bonding was performed using an epoxy adhesive containing 15% BN in mtl (160°C, 15 kg/c+d.

0.5hr)、。0.5hr).

続いて、氷晶の回路未形成面に第1層回路のときと同様
の工程を施し、第2層回路を形成した。
Subsequently, the same process as for the first layer circuit was performed on the non-circuit surface of the ice crystal to form a second layer circuit.

しかる後、氷晶の部品搭載用パッド部を除く部分に半田
レジスト(HR16,太陽インキ社製)及びフラックス
を塗布して仕上げを行った。
Thereafter, a solder resist (HR16, manufactured by Taiyo Ink Co., Ltd.) and flux were applied to the parts of the ice crystal except for the component mounting pads for finishing.

氷晶には、初期において断線故障はみられず、又一部の
回路を切断検鏡した際にも割れは全く認められなかった
。更に、250℃のオイルと冷水を用いた交互浸漬を5
0回くり返したが、電気抵抗の変化は初期値の5%息内
に留まった。比較のため、第1層及び第2層回路を予め
形成してからA4板に張合わせた回路基板について、前
記同様の交互浸漬を行ったところ、10回で電気抵抗の
変化が初期値の10%を超え、50回で1よ@路の一部
に断線が生じた。断線等の故障は0.3m+hライン及
びスルーホール近傍に多く見られた。
No breakage failures were observed in the ice crystals at the initial stage, and no cracks were observed when some circuits were cut and examined under a microscope. Furthermore, 5 cycles of alternate immersion using 250°C oil and cold water were performed.
Although the test was repeated 0 times, the change in electrical resistance remained within 5% of the initial value. For comparison, a circuit board on which the first and second layer circuits had been formed and then laminated onto an A4 board was subjected to the same alternating dipping as described above, and the change in electrical resistance was 10% of the initial value after 10 times. %, and after 50 times, a break occurred in a part of the 1st line. Many failures such as disconnections were observed near the 0.3m+h line and through-holes.

本発明方法によるりレッド型子層ブリレ)−回路基板の
製造は極めて容易であり、得られた回路基板は放熱性、
伝熱特性に浸れていることが実験的に確認された。また
、実装密度についてjよ従来のセラミック基板に匹敵し
、製造コス)、も、約50%低減できることが判った。
It is extremely easy to produce a circuit board using the method of the present invention, and the resulting circuit board has excellent heat dissipation properties,
It was experimentally confirmed that the heat transfer properties are excellent. In addition, it was found that the packaging density was comparable to that of conventional ceramic substrates, and that the manufacturing cost (manufacturing cost) could be reduced by about 50%.

(発明の効果) 本発明は、金属基板とプラスチック箔体を採用して、多
層プリント回路基板の放熱性及び伝熱特性を向上させる
と共に、信頼性の高い高密度面実装を可能にし、かつ簡
略化された!M造工程で量産を容易にし、製造コストを
低減させることができるものである。
(Effects of the Invention) The present invention improves the heat dissipation and heat transfer characteristics of a multilayer printed circuit board by using a metal substrate and a plastic foil body, and also enables highly reliable and high-density surface mounting. It has become! The M manufacturing process facilitates mass production and reduces manufacturing costs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(8)ないしくflは本発明を工程順に説明する
断面図である。 ドブラスチック、2a、2b・金属導体箔、3 スルー
ホール、4−Cu1ソ’f層、5a、5b。 5c  第1層回路、6 絶縁層、7・金属基板、8a
、8b  第21層回路。 第 l 丙 OJ) 〜−〜 9     5       g 手続補正書(自発) 昭和61年10月20日
FIGS. 1(8) to 1(f) are cross-sectional views illustrating the present invention step by step. Dobrastic, 2a, 2b・Metal conductor foil, 3 Through hole, 4-Cu1 so'f layer, 5a, 5b. 5c 1st layer circuit, 6 Insulating layer, 7 Metal substrate, 8a
, 8b 21st layer circuit. No. 1 C OJ) ~--- 9 5 g Procedural amendment (voluntary) October 20, 1985

Claims (2)

【特許請求の範囲】[Claims] (1)リジッド型多層プリント回路基板を製造するに際
して、 イ)プラスチック箔体の両面に金属導体箔を 貼着して
得たフレキシブル導体に、所望のスルーホールを形成す
る工程と、 ロ)前記スルーホール内を含む前記フレキシブル導体全
面にCuメッキ層を形成する工 程と、 ハ)前記フレキシブル導体の片面に第1層回路を形成す
る工程と、 ニ)前記第1層回路形成面を接合面として、前記フレキ
シブル導体と金属基板を、絶縁 層を介して接合する工程と、 ホ)前記フレキシブル導体の非接合面に第2層回路を形
成する工程と、 を順次施すことを特徴とするリジッド型多層プリント回
路基板の製造方法。
(1) When manufacturing a rigid multilayer printed circuit board, a) a step of forming desired through holes in a flexible conductor obtained by pasting metal conductor foil on both sides of a plastic foil body, and b) the step of forming the through hole a step of forming a Cu plating layer on the entire surface of the flexible conductor including inside the hole, c) forming a first layer circuit on one side of the flexible conductor, and d) using the first layer circuit formation surface as a bonding surface, A rigid multilayer print characterized by sequentially performing the steps of: bonding the flexible conductor and the metal substrate via an insulating layer; and e) forming a second layer circuit on the non-bonding surface of the flexible conductor. Method of manufacturing circuit boards.
(2)最外層を残して積層回路を形成したのち、絶縁層
を介して金属板上に、これを接合し、しかるのち最外層
回路を形成することを特徴とする第1項記載のリジッド
型多層プリント回路基板の製造方法。
(2) The rigid type according to item 1, characterized in that the laminated circuit is formed leaving the outermost layer, and then this is bonded to a metal plate via an insulating layer, and then the outermost layer circuit is formed. A method of manufacturing a multilayer printed circuit board.
JP26839585A 1985-11-30 1985-11-30 Manufacture of rigid multilayer printed circuit substrate Granted JPS62128596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26839585A JPS62128596A (en) 1985-11-30 1985-11-30 Manufacture of rigid multilayer printed circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26839585A JPS62128596A (en) 1985-11-30 1985-11-30 Manufacture of rigid multilayer printed circuit substrate

Publications (2)

Publication Number Publication Date
JPS62128596A true JPS62128596A (en) 1987-06-10
JPH0353796B2 JPH0353796B2 (en) 1991-08-16

Family

ID=17457877

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26839585A Granted JPS62128596A (en) 1985-11-30 1985-11-30 Manufacture of rigid multilayer printed circuit substrate

Country Status (1)

Country Link
JP (1) JPS62128596A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0312994A (en) * 1989-06-02 1991-01-21 Internatl Business Mach Corp <Ibm> Manufacture of multilayer wiring board
JPH04119696A (en) * 1990-09-11 1992-04-21 Denki Kagaku Kogyo Kk Metal-base multilayered circuit board
JP2017108044A (en) * 2015-12-11 2017-06-15 株式会社Daiwa Wiring board laminate and method of manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0312994A (en) * 1989-06-02 1991-01-21 Internatl Business Mach Corp <Ibm> Manufacture of multilayer wiring board
JPH04119696A (en) * 1990-09-11 1992-04-21 Denki Kagaku Kogyo Kk Metal-base multilayered circuit board
JP2017108044A (en) * 2015-12-11 2017-06-15 株式会社Daiwa Wiring board laminate and method of manufacturing the same

Also Published As

Publication number Publication date
JPH0353796B2 (en) 1991-08-16

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